p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 603

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p2125vps20

Manufacturer Part Number
p2125vps20
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
[Legend]
X:
Bit
6
5
4
3
2
1
0
Bit Name
STS2
STS1
STS0
SCK2
SCK1
SCK0
Don't care
Initial
Value
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Standby Timer Select 2 to 0
On canceling software standby mode, watch mode, or
subactive mode, these bits select the wait time for clock
stabilization from clock oscillation start. Select a wait time of 8
ms (oscillation stabilization time) or more, depending on the
operating frequency. Table 22.1 shows the relationship
between the STS2 to STS0 values and wait time.
With an external clock, an arbitrary wait time can be selected.
For normal cases, the minimum value is recommended.
Reserved
The initial value should not be changed.
System Clock Select 2 to 0
These bits select a clock for the bus master in high-speed
mode or medium-speed mode.
When making a transition to subactive mode or watch mode,
these bits must be cleared to B'000.
000: High-speed mode
001: Medium-speed clock: φ/2
010: Medium-speed clock: φ/4
011: Medium-speed clock: φ/8
100: Medium-speed clock: φ/16
101: Medium-speed clock: φ/32
11X: Setting prohibited
Rev. 1.00 Sep. 21, 2006 Page 565 of 658
Section 22 Power-Down Modes
REJ09B0310-0100

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