p2125vps20 Renesas Electronics Corporation., p2125vps20 Datasheet - Page 598

• Manufacturer Part Number: p2125vps20
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 21 Clock Pulse Generator
21.6
To remove noise from the subclock input at the EXCL pin, the subclock waveform forming circuit
samples the subclock using a divided φ clock. The sampling frequency is set by the NESEL bit in
LPWRCR.
The subclock is not sampled in subactive mode, subsleep mode, or watch mode.
21.7
The clock select circuit selects the system clock that is used in this LSI.
A clock generated by the oscillator to which the XTAL and EXTAL pins are connected is selected
as a system clock (φ) when returning from high-speed mode, medium-speed mode, sleep mode,
the reset state, or standby mode.
In subactive mode, subsleep mode, or watch mode, a subclock input from the EXCL pin is
selected as a system clock when the EXCLE bit in LPWRCR is 1. At this time, on-chip peripheral
modules such as the CPU, TMR_0, TMR_1, WDT_0, WDT_1, I/O ports, and interrupt controller
and their functions operate on the φSUB clock. The count clock and sampling clock for each timer
are divided φSUB clocks.
Rev. 1.00 Sep. 21, 2006 Page 560 of 658
REJ09B0310-0100
Subclock Waveform Forming Circuit
Clock Select Circuit