PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 336

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PEB2256E

Manufacturer Part Number
PEB2256E
Description
E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
Mode Register (Read/Write)
Value after reset: 00
MODE
MDS(2:0)
BRAC
HRAC
DIV
1)
Data Sheet
CCR2.RADD must be set, if SS7 mode is selected
MDS2
7
Mode Select - HDLC Channel 1
The operating mode of the HDLC controller is selected.
000 Reserved
001 Signaling System 7 (SS7) support
010 One-byte address comparison mode (RAL1, 2)
011 Two-byte address comparison mode (RAH1, 2 and RAL1, 2)
100 No address comparison
101 One-byte address comparison mode (RAH1, 2)
110 Reserved
111 No HDLC framing mode 1
BOM Receiver Active - HDLC Channel 1
Switches the BOM receiver to operational or inoperational state.
0
1
Receiver Active - HDLC Channel 1
Switches the HDLC receiver to operational or inoperational state.
0
1
Data Inversion - HDLC Channel 1
Setting this bit inverts the internal generated HDLC channel 1 data
stream.
0
1
MDS1
H
Receiver inactive
Receiver active
Receiver inactive
Receiver active
Normal operation, HDLC data stream not inverted
HDLC data stream inverted
MDS0
BRAC
336
HRAC
DIV
1)
T1/J1 Registers
FALC56 V1.2
0
PEB 2256
2002-08-27
(03)

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