PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 376

• Manufacturer Part Number: PEB2256E
• Description: E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

System Interface Control 3(Read/Write)
Value after reset: 00
SIC3
CMI
RESX
Data Sheet
CMI
7
100 =
101 =
110 =
111 =
Select CMI Precoding
Only valid if CMI code (FMR0.XC(1:0) = 01) is selected. This bit
defines
the CMI precoding and influences transmit and receive data.
0 =
1 =
Rising Edge Synchronous Pulse Transmit
Depending on this bit all transmit system interface data and marker
are clocked or sampled with the selected active edge.
CMR2.IXSC = 0:
0
1
CMR2.IXSC = 1:
value of RESX bit has no impact on the selected edge of the PCM
highway clock but value of RESR bit is used as RESX.
Example: If RESR = 0, the rising edge of PCM highway clock is the
selected one for sampling data on XDI and vice versa.
Note:Before local loop is closed, B8ZS precoding has to be switched
H
off.
CMI with B8ZS precoding
CMI without B8ZS precoding
latched with the first falling edge of the selected PCM highway
clock.
latched with the first rising edge of the selected PCM highway
clock.
Data active in channel phase 5, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 6, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 7, valid if data rate is 16 or
12 Mbit/s
Data active in channel phase 8, valid if data rate is 16 or
12 Mbit/s
376
RESX
RESR
TTRF
T1/J1 Registers
FALC56 V1.2
DAF
0
PEB 2256
2002-08-27
(40)