PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 337

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PEB2256E

Manufacturer Part Number
PEB2256E
Description
E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
Receive Address Byte High Register 1 (Read/Write)
Value after reset: FD
RAH1
In operating modes that provide high byte address recognition, the high byte of the
received address is compared to the individually programmable values in RAH1 and
RAH2. The address registers are used by all HDLC channels in common.
RAH1
Receive Address Byte High Register 2 (Read/Write)
Value after reset: FF
RAH2
RAH2
Receive Address Byte Low Register 1 (Read/Write)
Value after reset: FF
RAL1
RAL1
Receive Address Byte Low Register 2 (Read/Write)
Value after reset: FF
RAL2
RAL2
Data Sheet
7
7
7
7
Value of the First Individual High Address Byte
Bit 1 (C/R-bit) is excluded from address comparison.
Value of Second Individual High Address Byte
Value of First Individual Low Address Byte
Value of the second individually programmable low address
byte.
H
H
H
H
337
1
0
T1/J1 Registers
FALC56 V1.2
0
0
0
0
PEB 2256
2002-08-27
(04)
(05)
(06)
(07)

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