PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 83

• Manufacturer Part Number: PEB2256E
• Description: E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

4.2.3
The multiframe structure shown in
the receiver and FMR1.XFS for the transmitter.
Multiframe
Frame alignment
Multiframe alignment :
CRC bits
CRC block size
CRC procedure
Table 18
Multiframe I
E:
S
C
A:
Data Sheet
a
1
:
… C
4
:
CRC-Multiframe (E1)
Spare bits for international use. Access to received information through bits
RSP.RS13 and RSP.RS15. Transmission is enabled by bits XSP.XS13 and
XSP.XS15. Additionally, automatic transmission for submultiframe error
indication is selectable.
Spare bits for national use. Additionally, S
RSA4…8 and XSA4…8 is provided. HDLC-signaling in bits S
selectable.
Cyclic redundancy check bits.
Remote alarm indication. Additionally, automatic transmission of the A-bit is
selectable.
Sub-
Multiframe
II
CRC-Multiframe Structure (E1)
:
:
:
:
:
2 submultiframes = 2
refer to section Doubleframe Format
bit 1 of frames 1, 3, 5, 7, 9, 11 with the pattern "001011"
bit 1 of frames 0, 2, 4, 6, 8, 10, 12, 14
2048 bit (length of a submultiframe)
CRC4, according to ITU-T G.704 and G.706
Frame
Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Table 18
83
is enabled by setting bit: FMR2.RFS1/0 for
1
C
0
C
0
C
1
C
0
C
1
C
1
C
E*
C
E*
1
2
3
4
1
2
3
4
8 frames
2
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bits 1 to 8 of the Frame
3
0
A
0
A
0
A
0
A
0
A
0
A
0
A
0
A
a
-bit access through registers
Functional Description E1
4
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a4
a4
a4
a4
a4
a4
a4
a4
5
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a5
a5
a5
a5
a5
a5
a5
a5
FALC56 V1.2
6
0
S
0
S
0
S
0
S
0
S
0
S
0
S
0
S
a61
a62
a63
a64
a61
a62
a63
a64
a
PEB 2256
4 to S
2002-08-27
7
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
a7
a7
a7
a7
a7
a7
a7
a7
a
8
1
S
1
S
1
S
1
S
1
S
1
S
1
S
1
S
8 is
a8
a8
a8
a8
a8
a8
a8
a8