C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 111

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

9.
The voltage reference circuitry offers full flexibility in operating the ADC2 and DAC modules. Two voltage
reference input pins allow ADC2 and the two DACs to reference an external voltage reference or the on-
chip voltage reference output. ADC2 may also reference the analog power supply voltage, via the VREF
multiplexer shown in Figure 9.1.
The internal voltage reference circuit consists of a 1.2 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier. The internal reference may be routed via the VREF pin
to external system components or to the voltage reference input pins shown in Figure 9.1. The maximum
load seen by the VREF pin must be less than 200 µA to AGND. Bypass capacitors of 0.1 µF and 4.7 µF
are recommended from the VREF pin to AGND, as shown in Figure 9.1.
The Reference Control Register 2, REF2CN (defined in Figure 9.2) enables/disables the internal reference
generator and selects the reference input for ADC2. The BIASE bit in REF2CN enables the on-board refer-
ence generator while the REFBE bit enables the gain-of-two buffer amplifier which drives the VREF pin.
When disabled, the supply current drawn by the bandgap and buffer amplifier falls to less than 1 µA (typi-
cal) and the output of the buffer amplifier enters a high impedance state. If the internal bandgap is used as
the reference voltage generator, BIASE and REFBE must both be set to logic 1. If the internal reference is
not used, REFBE may be set to logic 0. Note that the BIASE bit must be set to logic 1 if ADC2 or either
DAC is used, regardless of the voltage reference used. If neither ADC2 nor the DACs are being used, both
of these bits can be set to logic 0 to conserve power. Bit AD2VRS selects between VREF2 and AV+ for the
ADC2 voltage reference source. The electrical specifications for the Voltage Reference are given in
Table 9.1.
Voltage Reference 2 (C8051F060/2)
Reference
External
Voltage
Circuit
VDD
Recommended Bypass
4.7F
Figure 9.1. Voltage Reference Functional Block Diagram
R
Capacitors
+
0.1F
VREF2
VREFD
VREF
Rev. 1.2
REF2CN
C8051F060/1/2/3/4/5/6/7
DAC0
DAC1
Ref
REFBE
x2
AV+
1
0
Band-Gap
1.2V
BIASE
EN
ADC2
Ref
Bias to
ADC2,
DACs
111