C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 117

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

12.
C8051F06x family of devices include three on-chip programmable voltage comparators, shown in
Figure 12.1. Each comparator offers programmable response time and hysteresis. When assigned to a
Port pin, the Comparator output may be configured as open drain or push-pull, and Comparator inputs
should be configured as analog inputs (see
Inputs” on page
“14.5. Comparator0 Reset” on page
The output of a Comparator can be polled by software, used as an interrupt source, used as a reset
source, and/or routed to a Port pin. Each comparator can be individually enabled and disabled (shutdown).
When disabled, the Comparator output (if assigned to a Port I/O pin via the Crossbar) defaults to the logic
low state, and its supply current falls to less than 1 µA. See
Allocation” on page 205
Comparator Pin Assignments
CP0 +
CP1 +
CP2 +
CP0 -
CP1 -
CP2 -
Comparators
207). The Comparator may also be used as a reset source (see
P2.6
P2.7
P2.2
P2.3
P2.4
P2.5
CPnHYN1
CPnHYN0
CPnHYP1
CPnHYP0
CPnOUT
CPnRIF
CPnEN
CPnFIF
for details on configuring the Comparator output via the digital Crossbar. The
Figure 12.1. Comparator Functional Block Diagram
CPn +
CPn -
CPnMD1
CPnMD0
165).
CPnRIE
CPnFIE
Section “18.1.5. Configuring Port 1 and 2 pins as Analog
+
-
Rev. 1.2
VDD
GND
C8051F060/1/2/3/4/5/6/7
Decision
Reset
Tree
Section “18.1.1. Crossbar Pin Assignment and
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
Interrupt Flag
Rising-edge
CPn
Crossbar
Interrupt
Logic
Interrupt Flag
Falling-edge
Interrupt
CPn
CPn
CPn
Section
117