C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 19

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

1.
The C8051F06x family of devices are fully integrated mixed-signal System-on-a-Chip MCUs with 59 digital
I/O pins (C8051F060/2/4/6) or 24 digital I/O pins (C8051F061/3/5/7), and two integrated 16-bit 1 Msps
ADCs. Highlighted features are listed below; refer to Table 1.1 for specific product feature selection.
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With on-chip VDD monitor, Watchdog Timer, and clock oscillator, the C8051F06x family of devices are truly
stand-alone System-on-a-Chip solutions. All analog and digital peripherals are enabled/disabled and con-
figured by user firmware. The Flash memory can be reprogrammed even in-circuit, providing non-volatile
data storage, and also allowing field upgrades of the 8051 firmware.
On-board JTAG debug circuitry allows non-intrusive (uses no on-chip resources), full speed, in-circuit
debugging using the production MCU installed in the final application. This debug system supports inspec-
tion and modification of memory and registers, setting breakpoints, watchpoints, single stepping, Run and
Halt commands. All analog and digital peripherals are fully functional while debugging using JTAG.
Each MCU is specified for 2.7 to 3.6 V operation over the industrial temperature range (-45 to +85 °C). The
C8051F060/2/4/6 are available in a 100-pin TQFP package and the C8051F061/3/5/7 are available in a
64-pin TQFP package (see block diagrams in Figure 1.1, Figure 1.2, Figure 1.3 and Figure 1.4).
High-Speed pipelined 8051-compatible CIP-51 microcontroller core (up to 25 MIPS)
Two 16-bit 1 Msps ADCs with a Direct Memory Access controller
Controller Area Network (CAN 2.0B) Controller with 32 message objects, each with its own indentifier
mask (C8051F060/1/2/3)
In-system, full-speed, non-intrusive debug interface on-chip
10-bit 200 ksps ADC with PGA and 8-channel analog multiplexer (C8051F060/1/2/3)
Two 12-bit DACs with programmable update scheduling (C8051F060/1/2/3)
64 kB (C8051F060/1/2/3/4/5) or 32 kB (C8051F066/7) of in-system programmable Flash memory
4352 (4096 + 256) bytes of on-chip RAM
External Data Memory Interface with 64 kB direct address space (C8051F060/2/4/6)
SPI, SMBus/I2C, and (2) UART serial interfaces implemented in hardware
Five general purpose 16-bit Timers
Programmable Counter/Timer Array with six capture/compare modules
On-chip Watchdog Timer, VDD Monitor, and Temperature Sensor
System Overview
Rev. 1.2
C8051F060/1/2/3/4/5/6/7
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