C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 149

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

Bit7:
Bit6:
Bit5:
Bits4-3:
Bit2:
Bit1:
Bit0:
R/W
Bit7
CY
CY: Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry (addition) or a borrow
(subtraction). It is cleared to 0 by all other arithmetic operations.
AC: Auxiliary Carry Flag.
This bit is set when the last arithmetic operation resulted in a carry into (addition) or a bor-
row from (subtraction) the high order nibble. It is cleared to 0 by all other arithmetic opera-
tions.
F0: User Flag 0.
This is a bit-addressable, general purpose flag for use under software control.
RS1-RS0: Register Bank Select.
These bits select which register bank is used during register accesses.
OV: Overflow Flag.
This bit is set to 1 under the following circumstances:
• An ADD, ADDC, or SUBB instruction causes a sign-change overflow.
• A MUL instruction results in an overflow (result is greater than 255).
• A DIV instruction causes a divide-by-zero condition.
The OV bit is cleared to 0 by the ADD, ADDC, SUBB, MUL, and DIV instructions in all other
cases.
F1: User Flag 1.
This is a bit-addressable, general purpose flag for use under software control.
PARITY: Parity Flag.
This bit is set to 1 if the sum of the eight bits in the accumulator is odd and cleared if the sum
is even.
RS1
0
0
1
1
R/W
Bit6
AC
RS0
0
1
0
1
R/W
Bit5
F0
Figure 13.16. PSW: Program Status Word
Register Bank
RS1
R/W
Bit4
0
1
2
3
Rev. 1.2
RS0
R/W
Bit3
0x00 - 0x07
0x08 - 0x0F
0x10 - 0x17
0x18 - 0x1F
Address
C8051F060/1/2/3/4/5/6/7
R/W
Bit2
OV
R/W
Bit1
F1
SFR Address:
PARITY
SFR Page:
R/W
Bit0
0xD0
All Pages
Addressable
Reset Value
00000000
Bit
149