C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 297

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

24.2.3. Auto-Reload Mode
In Auto-Reload Mode, the counter/timer can be configured to count up or down and cause an interrupt/flag
to occur upon an overflow/underflow event. When counting up, the counter/timer will set its overflow/under-
flow flag (TFn) and cause an interrupt (if enabled) upon overflow/underflow, and the values in the Reload/
Capture Registers (RCAPnH and RCAPnL) are loaded into the timer and the timer is restarted. When the
Timer External Enable Bit (EXENn) bit is set to ‘1’ and the Decrement Enable Bit (DCENn) is ‘0’, a falling
edge (‘1’-to-‘0’ transition) on the TnEX pin (configured as an input in the digital crossbar) will cause a timer
reload (in addition to timer overflows causing auto-reloads). When DCENn is set to ‘1’, the state of the
TnEX pin controls whether the counter/timer counts up (increments) or down (decrements), and will not
cause an auto-reload or interrupt event. See
timer to count down.
When counting down, the counter/timer will set its overflow/underflow flag (TFn) and cause an interrupt (if
enabled) when the value in the timer (TMRnH and TMRnL registers) matches the 16-bit value in the
Reload/Capture Registers (RCAPnH and RCAPnL). This is considered an underflow event, and will cause
the timer to load the value 0xFFFF. The timer is automatically restarted when an underflow occurs.
Counter/Timer with Auto-Reload mode is selected by clearing the CP/RLn bit. Setting TRn to logic 1
enables and starts the timer.
In Auto-Reload Mode, the External Flag (EXFn) toggles upon every overflow or underflow and does not
cause an interrupt. The EXFn flag can be thought of as the most significant bit (MSB) of a 17-bit counter.
.
External Clock
SYSCLK
(XTAL1)
Tn
TnEX
Crossbar
8
2
12
Crossbar
Figure 24.12. T2, 3, and 4 Auto-reload Mode Block Diagram
(Timer 4 Only)
EXENn
SMBus
TRn
0
1
TMRnCF
M
T
n
1
Section 24.2.1
M
T
n
0
O
G
T
n
Reload
T
O
E
n
TCLK
Rev. 1.2
D
C
E
N
RCAPnL
TMRnL
C8051F060/1/2/3/4/5/6/7
0xFF
for information concerning configuration of a
RCAPnH
TMRnH
0xFF
Toggle Logic
OVF
CP/RLn
EXENn
EXFn
C/Tn
TRn
TFn
0
1
Interrupt
(Port Pin)
Tn
297