C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 181

DEV KIT FOR F060/F062/F063

C8051F060DK

Manufacturer Part Number
C8051F060DK
Description
DEV KIT FOR F060/F062/F063
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F060DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F060
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051060, C8051F062 and C8051F063
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1214

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F060DK
Manufacturer:
Silicon Labs
Quantity:
135
The Flash Access Limit security feature (see Figure 16.3) protects proprietary program code and data from
being read by software running on the C8051F060/1/2/3/4/5/6/7. This feature provides support for OEMs
that wish to program the MCU with proprietary value-added firmware before distribution. The value-added
firmware can be protected while allowing additional code to be programmed in remaining program memory
space later.
The Flash Access Limit (FAL) is a 16-bit address that establishes two logical partitions in the program
memory space. The first is an upper partition consisting of all the program memory locations at or above
the FAL address, and the second is a lower partition consisting of all the program memory locations start-
Flash Read Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
Flash Write/Erase Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
Flash Access Limit Register (FLACL)
Read and Write/Erase Security Bits
(Bit 7 is MSB)
Bit
7
6
5
4
3
2
1
0
0: Read operations are locked (disabled) for corresponding block across the JTAG interface.
1: Read operations are unlocked (enabled) for corresponding block across the JTAG inter-
face.
0: Write/Erase operations are locked (disabled) for corresponding block across the JTAG
interface.
1: Write/Erase operations are unlocked (enabled) for corresponding block across the JTAG
interface.
NOTE: When the block containing the security bytes is locked, the security bytes may be
written but not erased.
The Flash Access Limit is defined by the setting of the FLACL register, as described in
Figure 16.3. Firmware running at or above this address is prohibited from using the MOVX
and MOVC instructions to read, write, or erase Flash locations below this address.
Figure 16.2. C8051F066/7 Flash Program Memory Map and Security Bytes
Memory Block
0x6000 - 0x7FFD
0x4000 - 0x5FFF
0x2000 - 0x3FFF
0x0000 - 0x1FFF
N/A
N/A
N/A
N/A
Write/Erase Lock Byte
Read Lock Byte
Memory Space
Program/Data
SFLE = 0
Reserved
Rev. 1.2
C8051F060/1/2/3/4/5/6/7
0xFFFF
0x8000
0x7FFF
0x7FFE
0x7FFD
0x0000
Flash Access Limit
Scratchpad Memory
SFLE = 1
(Data only)
0x007F
0x0000
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