C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 144

• Manufacturer Part Number: C8051F060DK
• Description: DEV KIT FOR F060/F062/F063
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F060DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F06x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F060
• Silicon Family Name: C8051F06x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051060, C8051F062 and C8051F063
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1214

C8051F060/1/2/3/4/5/6/7
144
SFRs are listed in alphabetical order. All undefined SFR locations are reserved.
Register
CPT2MD
DAC0CN
DAC0H
DAC0L
DAC1CN
DAC1H
DAC1L
DMA0BND
DMA0CF
DMA0CN
DMA0CSH
DMA0CSL
DMA0CTH
DMA0CTL
DMA0DAH
DMA0DAL
DMA0DSH
DMA0DSL
DMA0IDT
DMA0IPT
DMA0ISW
DPH
DPL
EIE1
EIE2
EIP1
EIP2
EMI0CF
EMI0CN
EMI0TC
FLACL
FLSCL
IE
IP
OSCICL
OSCICN
OSCXCN
P0
P0MDOUT
P1
P1MDIN
P1MDOUT
P2
Address
0xFD
0xFC
0xDA
0xDC
0xDB
0xDE
0xDD
0xAD
0xD4
0xD3
0xD2
0xD4
0xD3
0xD2
0xD8
0xFB
0xFA
0xD9
0xFE
0xE6
0xE7
0xA3
0xA2
0xA1
0xB7
0xB7
0xA8
0xB8
0x8B
0x8A
0x8C
0xA4
0xA5
0xA0
0x89
0xF8
0xF9
0x83
0x82
0xF6
0xF7
0x80
0x90
Table 13.3. Special Function Registers (Continued)
SFR Page Description
All Pages Data Pointer High
All Pages Data Pointer Low
All Pages Extended Interrupt Enable 1
All Pages Extended Interrupt Enable 2
All Pages Extended Interrupt Priority 1
All Pages Extended Interrupt Priority 2
All Pages Interrupt Enable
All Pages Interrupt Priority
All Pages Port 0 Latch
All Pages Port 1 Latch
All Pages Port 2 Latch
F
F
F
F
F
F
F
3
0
0
0
1
1
1
3
3
3
3
3
3
3
3
3
3
3
3
3
3
0
0
0
0
Comparator 2 Configuration
DAC0 Control
DAC0 High
DAC0 Low
DAC1 Control
DAC1 High
DAC1 Low
DMA0 Instruction Boundary
DMA0 Configuration
DMA0 Control
DMA0 Repeat Counter Status High Byte
DMA0 Repeat Counter Status Low Byte
DMA0 Repeat Counter Limit High Byte
DMA0 Repeat Counter Limit Low Byte
DMA0 Data Address Beginning High Byte
DMA0 Data Address Beginning Low Byte
DMA0 Data Address Pointer High Byte
DMA0 Data Address Pointer Low Byte
DMA0 Instruction Write Data
DMA0 Instruction Write Address
DMA0 Instruction Status
EMIF Configuration
EMIF Control
EMIF Timing Control
Flash Access Limit
Flash Scale
Internal Oscillator Calibration
Internal Oscillator Control
External Oscillator Control
Port 0 Output Mode Configuration
Port 1 Input Mode
Port 1 Output Mode Configuration
Rev. 1.2
page 106
page 105
page 105
page 108
page 107
page 107
page 189
page 189
page 194
Page No.
page 121
page 148
page 148
page 156
page 157
page 158
page 159
page 182
page 184
page 154
page 172
page 172
page 174
page 214
page 214
page 215
page 215
page 216
page 216
page 155
page 83
page 81
page 80
page 85
page 85
page 85
page 85
page 84
page 84
page 84
page 84
page 82
page 82
page 83
*5
*5
*5
*5
*5
*5
*1
*1
*1