M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 11

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CHAPTER 5 CLOCK GENERATOR .....................................................................................................159
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP) .................................................................174
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ) ................................................................274
4.3
4.4
4.5
4.6
4.7
5.1
5.2
5.3
5.4
5.5
5.6
6.1
6.2
6.3
6.4
6.5
6.6
4.2.1
4.2.2
Port Configuration ....................................................................................................................84
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
Output Data and Port Read Value for Each Setting ............................................................141
Port Register Settings When Alternate Function Is Used ..................................................147
Noise Eliminator......................................................................................................................153
Cautions...................................................................................................................................157
4.7.1
4.7.2
Overview ..................................................................................................................................159
Configuration ..........................................................................................................................160
Control Registers....................................................................................................................162
PLL Function ...........................................................................................................................168
5.4.1
5.4.2
5.4.3
5.4.4
Operation .................................................................................................................................169
5.5.1
5.5.2
Clock Monitor ..........................................................................................................................173
Overview ..................................................................................................................................174
Functions .................................................................................................................................174
Configuration ..........................................................................................................................175
Registers..................................................................................................................................180
Timer Output Operations .......................................................................................................193
Operation .................................................................................................................................194
6.6.1
6.6.2
6.6.3
6.6.4
6.6.5
6.6.6
6.6.7
V850E/IA3 .................................................................................................................................... 82
V850E/IA4 .................................................................................................................................... 83
Port 0............................................................................................................................................ 89
Port 1............................................................................................................................................ 96
Port 2 (V850E/IA4 only) .............................................................................................................. 105
Port 3.......................................................................................................................................... 111
Port 4.......................................................................................................................................... 122
Port 5 (V850E/IA4 only) .............................................................................................................. 129
Port 7.......................................................................................................................................... 134
Port DL ....................................................................................................................................... 137
Cautions on setting port pins ...................................................................................................... 157
Cautions on bit manipulation instruction for port n register (Pn) ................................................. 158
Overview..................................................................................................................................... 168
Setting PLL output frequency ..................................................................................................... 168
PLL mode ................................................................................................................................... 168
Clock-through mode ................................................................................................................... 168
Operation of each clock .............................................................................................................. 169
Operation timing ......................................................................................................................... 170
Interval timer mode (TPnMD2 to TPnMD0 bits = 000)................................................................ 201
External event count mode (TPkMD2 to TPkMD0 bits = 001) .................................................... 213
External trigger pulse output mode (TPmMD2 to TPmMD0 bits = 010)...................................... 222
One-shot pulse output mode (TPmMD2 to TPmMD0 bits = 011) ............................................... 235
PWM output mode (TPmMD2 to TPmMD0 bits = 100)............................................................... 242
Free-running timer mode (TPnMD2 to TPnMD0 bits = 101) ....................................................... 251
Pulse width measurement mode (TPkMD2 to TPkMD0 bits = 110)............................................ 268
User’s Manual U16543EJ4V0UD
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