M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 694

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.4 External Interrupt Request Input Pins (INTP0 to INTP7)
17.4.1 Noise elimination
692
(1) Noise elimination of INTP0, INTP1 (V850E/IA4 only), INTP2 to INTP5, and INTP7 pins
(2) Noise elimination of INTP6 pin
The INTP0, INTP1 (V850E/IA4 only), INTP2 to INTP5, and INTP7 pins incorporate a noise eliminator that uses
analog delay. Unless, therefore, the input level of each pin is held for a certain time, an edge cannot be
detected. An edge is detected after a certain time has elapsed.
The INTP6 pin incorporates a digital noise eliminator.
The sampling clock that performs digital sampling can be selected from f
The system clock stops in the IDLE and STOP modes, so the INTP6 pin cannot be used to cancel the IDLE
and STOP modes.
(a) External interrupt noise elimination control register (INTPNRC)
The INTPNRC register is used to select the sampling clock that is used to eliminate digital noise on the
INTP6 pin. If the same level is not detected five times in a row, the signal is eliminated as noise.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. If the input pulse lasts for the duration of 4 to 5 clocks, it is undefined whether the
INTPNRC
After reset: 00H
2. If noise is generated in synchronization with the sampling clock, eliminate the noise
3. Noise is not eliminated if the pin is used as a normal input port pin.
INTPNRC1
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
pulse is detected as a valid edge or eliminated as noise. So that the pulse is
actually detected as a valid edge, the same pulse level must be input for the
duration of 5 clocks or more.
by attaching a filter to the input pin.
0
0
1
1
0
7
INTPNRC0
R/W
0
1
0
1
6
0
User’s Manual U16543EJ4V0UD
Address: FFFFF310H
f
f
f
f
XX
XX
XX
XX
/32
/16
/8
/4
5
0
4
0
Selection of sampling clock
3
0
2
0
XX
/4, f
INTPNRC1 INTPNRC0
XX
/8, f
1
XX
/16, or f
0
XX
/32.