M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 203

no-image

M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.6.1
TPnCCR0 register if the TPnCTL0.TPnCE bit is set to 1. A PWM waveform with a duty factor of 50% whose half cycle
is equal to the interval can be output from the TOP00 pin (TMP0 only).
transferred to the CCR1 buffer register, and when the count value of the 16-bit counter matches the value of the CCR1
buffer register, a compare match interrupt request signal (INTTPnCC1) is generated. In addition, a PWM waveform
with a duty factor of 50%, which is inverted when the INTTPmCC1 signal is generated, can be output from the TOPm1
pin.
In the interval timer mode, an interrupt request signal (INTTPnCC0) is generated at the interval set by the
The TPnCCR1 register is not used in the interval timer mode. However, the set value of the TPnCCR1 register is
The value of the TPnCCR0 and TPnCCR1 registers can be rewritten even while the timer is operating.
Remark
Interval timer mode (TPnMD2 to TPnMD0 bits = 000)
INTTPnCC0 signal
TPnCCR0 register
Count clock
selection
Remark
TOP00 pin output
Remark
V850E/IA3: m = 0, 2
V850E/IA4: m = 0, 2, 3
16-bit counter
TPnCE bit
FFFFH
0000H
n = 0 to 3
n = 0 to 3
TPnCE bit
Figure 6-10. Basic Timing of Operation in Interval Timer Mode
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Figure 6-9. Configuration of Interval Timer
Interval (D
D
0
User’s Manual U16543EJ4V0UD
0
+ 1) Interval (D
CCR0 buffer register
TPnCCR0 register
16-bit counter
Clear
D
0
Match signal
0
+ 1) Interval (D
D
0
D
0
0
+ 1) Interval (D
controller
Output
INTTPnCC0 signal
D
0
0
+ 1)
TOP00 pin
201

Related parts for M-V850E-IA4