M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 834

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
832
3rd edition
Edition
• Modification of part numbers of all products to lead-free products
• All products under development → Development completed
Addition of Note in 2.1 (2) Non-port pins
Addition of Caution in 3.4.8 (1) Setting data to special registers
Addition of description to 3.4.9 System wait control register (VSWC)
Addition of Caution in 4.6 (2) Noise elimination time select register 1n (NRC1n)
(V850E/IA3: n = 0, V850E/IA4: n = 0, 1)
Addition of Caution in 5.3 (6) Clock monitor mode register (CLM)
Addition of Note to Figure 6-4 TMP3 Block Diagram
Modification of Note in 6.4 (1) TMPn control register 0 (TPnCTL0)
Addition of description to 6.4 (6) TMPn option register 0 (TPnOPT0)
Addition of description to 6.4 (7) (a) Function as compare register and (b) Function as
capture register (TP0CCR0 and TP2CCR0 registers only)
Addition of description to 6.4 (8) (a) Function as compare register and (b) Function as
capture register (TP0CCR1 and TP2CCR1 registers only)
Addition of Note to Figure 6-5 Flowchart of Basic Operation for Anytime Write
Addition of Note to Figure 6-7 Flowchart of Basic Operation for Batch Write
Modification of description in 6.6.3 (2) (b) 0%/100% output of PWM waveform
Modification of Note in 7.4 (1) TMQn control register 0 (TQnCTL0)
Modification of Note in 7.4 (3) TMQn I/O control register 0 (TQnIOC0)
Addition of description in 7.4 (6) TMQn option register 0 (TQnOPT0)
Addition of description in 7.4 (7) (a) Function as compare register and (b) Function as
capture register (TQ0CCR0 register only)
Addition of description in 7.4 (8) (a) Function as compare register and (b) Function as
capture register (TQ0CCR1 register only)
Addition of description in 7.4 (9) (a) Function as compare register and (b) Function as
capture register (TQ0CCR2 register only)
Addition of description in 7.4 (10) (a) Function as compare register and (b) Function as
capture register (TQ0CCR3 register only)
Addition of Note to Figure 7-3 Flowchart of Basic Operation for Anytime Write
Addition of Note to Figure 7-5 Flowchart of Basic Operation for Batch Write
Modification of description in 7.6.5 (2) (b) 0%/100% output of PWM waveform
Modification of table description in 8.4 (5) (b) UDC mode (TUM1n.CMDn bit = 1)
Addition of Caution in 8.4 (8) Noise elimination time select register 1n (NRC1n)
Addition of Caution in 10.3 (3) TMQn option register 2 (TQnOPT2)
Addition of Note in 10.3 (6) High-impedance output control registers 00, 01, 10, 11, 20,
21 (HZAmCTL0, HZAmCTL1)
Modification of Caution in Figure 10-6 Timing Chart of 6-Phase PWM Output Mode
APPENDIX D REVISION HISTORY
User’s Manual U16543EJ4V0UD
Description
Throughout
CHAPTER 2 PIN
FUNCTIONS
CHAPTER 3 CPU
FUNCTION
CHAPTER 4 PORT
FUNCTIONS
CHAPTER 5 CLOCK
GENERATOR
CHAPTER 6 16-BIT
TIMER/EVENT
COUNTER P (TMP)
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTER Q (TMQ)
CHAPTER 8 16-BIT
2-PHASE ENCODER
INPUT UP/DOWN
COUNTER/
GENERAL-
PURPOSE TIMER
(TIMER ENC1n)
CHAPTER 10
MOTOR CONTROL
FUNCTION
Applied to:
(4/6)

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