M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 565

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

(2) Operation mode
Two operation modes are available: serial mode in which A/D conversion of one analog input pin (ANI2n)
continuously executed, and parallel mode in which conversion operations are executed in parallel with the time
difference between operations set on starting the first conversion (n = 0 to 7).
These operation modes are selected by the ADA2CTL3.ADA2TS bit.
Note The ANI26 and ANI27 pins are only available in the V850E/IA4.
(a) Serial mode
(b) Parallel mode
In this mode, the next conversion is started when A/D conversion of the analog input pin (ANI2n)
specified by the ADA2CTL2 register ends (n = 0 to 7).
Note The ANI26 and ANI27 pins are only available in the V850E/IA4.
• In 1-buffer mode
• In 4-buffer mode
In this mode, conversion of the analog input pin (ANI2n)
with a time difference of 1/4 the conversion time (n = 0 to 7).
Note The ANI26 and ANI27 pins are only available in the V850E/IA4.
• In 1-buffer mode
• In 4-buffer mode
Each time A/D conversion ends, the A/D2 conversion end interrupt request signal (INTAD2) is
generated.
The A/D2 conversion end interrupt request signal (INTAD2) is generated when A/D conversion has
ended four times.
Conversion is started at a time difference that is 1/4 of the conversion time specified by the ADA2CTL1
register, and the conversion result is stored in the ADA2CRn register corresponding to the ANI2n pin
(n = 0 to 7). The A/D2 conversion end interrupt request signal (INTAD2) is generated each time the
conversion result is stored in the ADA2CRn register (each 1/4 conversion time).
Note The ANI26 and ANI27 pins are only available in the V850E/IA4.
Conversion is started at a time difference that is 1/4 of the conversion time specified by the ADA2CTL1
register, and the conversion result is stored in four ADA2CRn registers (n = 0 to 7).
conversion end interrupt request signal (INTAD2) is generated after the conversion result is stored in the
four ADA2CRn registers.
CHAPTER 13 A/D CONVERTER 2
User’s Manual U16543EJ4V0UD
Note
specified by the ADA2CTL2 register is started
The A/D2
Note
563
Note
Note
is