M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 262

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
260
(2) Operation timing in free-running timer mode
(a) Interval operation with compare register
When 16-bit timer/event counter P is used as an interval timer with the TPnCCRa register used as a
compare register, software processing is necessary for setting a comparison value to generate the next
interrupt request signal each time the INTTPnCCa signal has been detected.
When performing an interval operation in the free-running timer mode, two intervals can be set with one
channel.
To perform the interval operation, the value of the corresponding TPnCCRa register must be re-set in the
interrupt servicing that is executed when the INTTPnCCa signal is detected.
The set value for re-setting the TPnCCRa register can be calculated by the following expression, where
“D
Remark
INTTPnCC0 signal
INTTPnCC1 signal
TPnCCR0 register
TPnCCR1 register
Compare register default value: D
Value set to compare register second and subsequent time: Previous set value + D
(If the calculation result is greater than FFFFH, subtract 10000H from the result and set this value to the
register.)
TOPm1 pin output
a
TOP00 pin output
” is the interval period.
16-bit counter
TPnCE bit
V850E/IA3: n = 0 to 3, m = 0, 2, a = 0, 1
V850E/IA4: n = 0 to 3, m = 0, 2, 3, a = 0, 1
FFFFH
0000H
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Interval period
Interval period
D
(D
(D
00
00
D
10
User’s Manual U16543EJ4V0UD
+ 1)
D
10
a
+ 1)
D
00
− 1
10
Interval period
(10000H +
D
01
Interval period
− D
(10000H +
D
D
D
00
11
)
01
01
− D
D
Interval period
10
D
11
(D
)
11
02
− D
D
Interval period
02
01
D
(10000H +
)
D
02
12
− D
Interval period
(10000H +
D
D
D
11
03
12
)
12
− D
D
03
02
D
)
Interval period
03
(10000H +
D
Interval period
13
(10000H +
D
− D
04
D
− D
D
12
13
)
D
13
03
04
)
D
a
04
D
D
14
05

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