M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 641

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.5.13 Reception error
the reception error interrupt request signal (INTCBnRE) is generated when the next receive operation is completed
before the CBnRX register is read after the reception end interrupt request signal (INTCBnR) is generated, and the
overrun error flag (CBnSTR.CBnOVE) is set to 1.
if a reception error has occurred, the INTCBnRE signal is generated again upon the next reception completion if the
CBnRX register is not read.
the next receive data from the INTCBnR signal generation.
INTCBnRE signal
When transfer is performed with reception enabled (CBnCTL0.CBnRXE bit = 1) in the continuous transfer mode,
Even if an overrun error has occurred, the previous receive data is lost since the CBnRX register is updated. Even
To avoid an overrun error, complete reading the CBnRX register until one half clock before sampling the last bit of
(1) Operation timing
(1) Start continuous transfer.
(2) Completion of the first transfer
(3) The CBnRX register cannot be read until one half clock before the completion of the second transfer.
(4) An overrun error occurs, and the reception error interrupt request signal (INTCBnRE) is generated. The
Remark
SIBn pin capture
INTCBnR signal
CBnRX register
CBnRX register
Shift register
CBnOVE bit
read signal
SCKBn pin
receive data is overwritten.
SIBn pin
timing
n = 0, 1
(1)
01H
CHAPTER 15 CLOCKED SERIAL INTERFACE B (CSIB)
02H
05H 0AH 15H 2AH 55H AAH 00H 01H 02H 05H 0AH 15H 2AH 55H
User’s Manual U16543EJ4V0UD
(2)
AAH
(3)
(4)
55H
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