M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 229

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
<1> Count operation start flow
<2> TPmCCR0 and TPmCCR1 register
setting change flow
(TPmCKS0 to TPmCKS2 bits)
Setting of TPmCCR0 register
Setting of TPmCCR1 register
Register initial setting
TPmCCR0 register,
TPmCTL1 register,
TPmIOC0 register,
TPmCCR1 register
TPmCTL0 register
TPkIOC2 register,
Remark
TPmCE bit = 1
Figure 6-26. Software Processing Flow in External Trigger Pulse Output Mode (2/2)
START
V850E/IA3: m = 0, 2, k = 0, 2, a = 0, 1
V850E/IA4: m = 0, 2, 3, k = 0, 2, a = 0, 1
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Initial setting of these
registers is performed
before setting the
TPmCE bit to 1.
The TPmCKS0 to
TPmCKS2 bits can be
set at the same time
when counting is
enabled (TPmCE bit = 1).
Trigger wait status
Writing same value
(same as preset value of
the TPmCCR1 register)
to the TPmCCR1 register
is necessary only when
the set cycle is changed.
When the counter is
cleared after setting,
the value of the TPmCCRa
register is transferred to
the CCRa buffer register.
User’s Manual U16543EJ4V0UD
<3> TPmCCR0, TPmCCR1 register
<4> TPmCCR0, TPmCCR1 register
<5> Count operation stop flow
setting change flow
Setting of TPmCCR1 register
setting change flow
Setting of TPmCCR0 register
Setting of TPmCCR1 register
TPmCE bit = 0
STOP
Counting is stopped.
Only writing of the TPmCCR1
register must be performed when
When the counter is cleared after
setting, the value of the
TPmCCRa register is transferred
to the CCRa buffer register.
When the counter is
cleared after setting,
the value of the TPmCCRa
register is transferred to
the CCRa buffer register.
the set duty factor is changed.
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