M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 188

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
186
(5) TMPk I/O control register 2 (TPkIOC2)
Cautions 1. Rewrite the TPkEES1, TPkEES0, TPkETS1, and TPkETS0 bits when the TPkCTL0.TPkCE bit
The TPkIOC2 register is an 8-bit register that controls the valid edge for the external event count input signal
(TIPk0 pin) and external trigger input signal (TIPk0 pin).
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Remark
2. The TPkEES1 and TPkEES0 bits are valid only when the TPkCTL1.TPkEEE bit = 1 or when
3. The TPkETS1 and TPkETS0 bits are valid only in the external trigger pulse output mode or
TPkIOC2
(k = 0, 2)
= 0. (The same value can be written when the TPkCE bit = 1.) If rewriting was mistakenly
performed, clear the TPkCE bit to 0 and then set the bits again.
the external event count mode (TPkCTL1.TPkMD2 to TPkCTL1.TPkMD0 bits = 001) has
been set.
one-shot pulse output mode.
TMP1 and TMP3 do not have the TP1IOC2 and TP3IOC2 registers.
After reset: 00H
TPkEES1
TPkETS1
0
0
1
1
0
0
1
1
7
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
TPkEES0
TPkETS0
R/W
6
0
0
1
0
1
0
1
0
1
Address:
External event count input signal (TIPk0 pin) valid edge setting
User’s Manual U16543EJ4V0UD
No edge detection (external event count invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
No edge detection (external trigger invalid)
Detection of rising edge
Detection of falling edge
Detection of both edges
External trigger input signal (TIPk0 pin) valid edge setting
5
0
TP0IOC2 FFFFF644H, TP2IOC2 FFFFF684H
4
0
TPkEES1 TPkEES0 TPkETS1 TPkETS0
3
2
1
0

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