M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 681

• Manufacturer Part Number: M-V850E-IA4
• Description: KIT EVAL V850E IA4 UPD70F3186
• Manufacturer: Renesas Electronics America

Specifications of M-V850E-IA4

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.2 Restore
of the restored PC.
Recovery from maskable interrupt servicing is carried out by the RETI instruction.
When the RETI instruction is executed, the CPU performs the following steps, and transfers control to the address
<1> Restores the values of the PC and the PSW from EIPC and EIPSW because the PSW.EP bit is 0 and the
<2> Transfers control to the address of the restored PC and PSW.
The processing of the RETI instruction is shown below.
Note For the ISPR register, see 17.3.6 In-service priority register (ISPR).
Caution When the EP and NP bits are changed by the LDSR instruction during non-maskable interrupt
Remark
PSW.NP bit is 0.
servicing, in order to restore the PC and PSW correctly during recovery by the RETI
instruction, it is necessary to set EP back to 0 and NP back to 1 using the LDSR instruction
immediately before the RETI instruction.
The solid line shows the CPU processing flow.
1
PC
PSW
Corresponding
bit of ISPR
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Restores original processing
RETI instruction
Note
Figure 17-5. RETI Instruction Processing
PSW.EP
PSW.NP
0
0
EIPC
EIPSW
0
User’s Manual U16543EJ4V0UD
1
PC
PSW
FEPC
FEPSW
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