M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 280

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
278
(3) CCR1 buffer register
(4) CCR2 buffer register
(5) CCR3 buffer register
(6) Edge detector
(7) Output controller
(8) Selector
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQnCCR1 register is used as a compare register, the value written to the TQnCCR1 register is
transferred to the CCR1 buffer register. When the count value of the 16-bit counter matches the value of the
CCR1 buffer register, a compare match interrupt request signal (INTTQnCC1) is generated.
The CCR1 buffer register cannot be read or written directly.
The TQnCCR1 register is cleared to 0000H after reset, and the CCR1 buffer register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQnCCR2 register is used as a compare register, the value written to the TQnCCR2 register is
transferred to the CCR2 buffer register. When the count value of the 16-bit counter matches the value of the
CCR2 buffer register, a compare match interrupt request signal (INTTQnCC2) is generated.
The CCR2 buffer register cannot be read or written directly.
The TQnCCR2 register is cleared to 0000H after reset, and the CCR2 buffer register is cleared to 0000H.
This is a 16-bit compare register that compares the count value of the 16-bit counter.
When the TQnCCR3 register is used as a compare register, the value written to the TQnCCR3 register is
transferred to the CCR3 buffer register. When the count value of the 16-bit counter matches the value of the
CCR3 buffer register, a compare match interrupt request signal (INTTQnCC3) is generated.
The CCR3 buffer register cannot be read or written directly.
The TQnCCR3 register is cleared to 0000H after reset, and the CCR3 buffer register is cleared to 0000H.
This circuit detects the valid edges input to the TIQ00 to TIQ03, EVTQ0, and TRGQ0 pins. No edge, rising
edge, falling edge, or both the rising and falling edges can be selected as the valid edge by using the TQ0IOC1
and TQ0IOC2 registers.
This circuit controls the output of the TOQ00 to TOQ03 and TOQ10 (V850E/IA4 only) pins. The output of the
TOQ00 to TOQ03 pins is controlled by the TQ0IOC0 register. The output of the TOQ10 (V850E/IA4 only) pin is
controlled by the TQ1IOC0 register.
This selector selects the count clock for the 16-bit counter. Eight types of internal clocks or an external event
can be selected as the count clock.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
User’s Manual U16543EJ4V0UD

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