M-V850E-IA4 Renesas Electronics America, M-V850E-IA4 Datasheet - Page 604

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M-V850E-IA4

Manufacturer Part Number
M-V850E-IA4
Description
KIT EVAL V850E IA4 UPD70F3186
Manufacturer
Renesas Electronics America
Datasheets

Specifications of M-V850E-IA4

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.4 Control Registers
602
The following registers are used to control CSIBn.
• CSIBn control register 0 (CBnCTL0)
• CSIBn control register 1 (CBnCTL1)
• CSIBn control register 2 (CBnCTL2)
• CSIBn status register (CBnSTR)
(1) CSIBn control register 0 (CBnCTL0)
CBnCTL0 is a register that controls the CSIBn serial transfer operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 01H.
CBnCTL0
(n = 0, 1)
After reset: 01H
Note These bits can only be rewritten when the CBnPWR bit = 0.
Caution Be sure to clear bits 3 and 2 to “0”.
CBnPWR
CBnTXE
CBnRXE
CBnPWR
• The CBnPWR bit controls the CSIBn operation and resets the internal circuit.
• The SOBn output is low level when the CBnTXE bit is 0.
• When the CBnRXE bit is cleared to 0, no reception end interrupt is output even
when the prescribed data is transferred in order to disable the receive operation,
and the receive data (CBnRX register) is not updated.
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0
1
0
1
0
1
CHAPTER 15 CLOCKED SERIAL INTERFACE B (CSIB)
Note
Note
However, CBnPWR bit = 1 can also be set at the same time as
rewriting these bits.
R/W
CBnTXE
Disable CSIBn operation and reset the CBnSTR register
Enable CSIBn operation
Disable transmit operation
Enable transmit operation
Disable receive operation
Enable receive operation
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Note
Address: CB0CTL0 FFFFFD00H, CB1CTL0 FFFFFD10H
CBnRXE
User’s Manual U16543EJ4V0UD
Specification of transmit operation disable/enable
Specification of receive operation disable/enable
Specification of CSIBn operation disable/enable
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Note
CBnDIR
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Note
0
0
CBnTMS
Note
CBnSCE
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(1/2)

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