ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 122

MCU AVR 4K FLASH 8MHZ 20-QFN

ATTINY43U-MU

Manufacturer Part Number
ATTINY43U-MU
Description
MCU AVR 4K FLASH 8MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY43U-MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.8
16.9
122
Analog Input Circuitry
Analog Noise Canceling Techniques
ATtiny43U
Note that the ADC will not automatically be turned off when entering other sleep modes than Idle
mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before enter-
ing such sleep modes to avoid excessive power consumption.
The analog input circuitry for single ended channels is illustrated in
source applied to ADCn is subjected to the pin capacitance and input leakage of that pin, regard-
less of whether that channel is selected as input for the ADC. When the channel is selected, the
source must drive the S/H capacitor through the series resistance (combined resistance in the
input path).
The ADC is optimized for analog signals with an output impedance of approximately 10kΩ or
less. If such a source is used, the sampling time will be negligible. If a source with higher imped-
ance is used, the sampling time will depend on how long time the source needs to charge the
S/H capacitor, which can vary widely. With slowly varying signals the user is recommended to
use sources with low impedance, only, since this minimizes the required charge transfer to the
S/H capacitor.
In order to avoid distortion from unpredictable signal convolution, signal components higher than
the Nyquist frequency (f
quency components with a low-pass filter before applying the signals as inputs to the ADC.
Figure 16-8. Analog Input Circuitry
Note:
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
• Keep analog signal paths as short as possible.
• Make sure analog tracks run over the analog ground plane.
conversion completes. The CPU will remain in active mode until a new sleep command is
executed.
The capacitor in the figure depicts the total capacitance, including the sample/hold capacitor and
any stray or parasitic capacitance inside the device. The value given is worst case.
ADCn
ADC
/2) should not be present. The user is advised to remove high fre-
I
IH
I
IL
1..100 kohm
C
S/H
= 14 pF
Figure
V
16-8. An analog
CC
/2
8048B–AVR–03/09

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