ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 163

• Manufacturer Part Number: ATTINY43U-MU
• Description: MCU AVR 4K FLASH 8MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY43U-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 20-5. Parallel Programming Timing, Loading Sequence with Timing Requirements
Table 20-10. Parallel Programming Characteristics, V
Note:
8048B–AVR–03/09
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
BVDV
OLDV
OHDZ
PP
PAGEL/BS1
1. t
2. t
XA1/BS2
DATA
CLKI
XA0
WLRH
WLRH_CE
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before CLKI High
CLKI Low to CLKI High
CLKI Pulse Width High
Data and Control Hold after CLKI Low
CLKI Low to WR Low
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
CLKI Low to OE Low
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits commands.
is valid for the Chip Erase command.
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
(1)
(LOW BYTE)
LOAD DATA
DATA (Low Byte)
(2)
CC
= 5V ± 10%
t
XLXH
(HIGH BYTE)
LOAD DATA
DATA (High Byte)
11.5
Min
200
150
150
150
3.7
7.5
67
67
67
67
67
67
67
0
0
0
0
Typ
LOAD ADDRESS
(LOW BYTE)
ADDR1 (Low Byte)
Max
12.5
250
250
250
250
4.5
1
9
Units
μA
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
V
163