ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 141

• Manufacturer Part Number: ATTINY43U-MU
• Description: MCU AVR 4K FLASH 8MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY43U-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.2.1
19.3
8048B–AVR–03/09
Device Signature Imprint Table
Latching of Fuses
Table 19-5.
Notes:
Note that fuse bits are locked if Lock Bit 1 (LB1) is programmed. Fuse bits should be pro-
grammed before lock bits. The status of fuse bits is not affected by chip erase.
Fuse bits can also be read by device firmware. See section
from Software” on page
Fuse values are latched when the device enters programming mode and changes to fuse values
have no effect until the part leaves programming mode. This does not apply to the EESAVE
Fuse which will take effect once it is programmed. Fuses are also latched on power-up.
The device signature imprint table is a dedicated memory area used for storing miscellaneous
device information, such as the device signature and oscillator calibaration data. Most of this
memory segment is reserved for internal use, as outlined in
Table 19-6.
Notes:
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Address
0x00
0x01
0x02
0x03
0x04
0x05 ... 0x2A
1. See
2. The default value of SUT1..0 results in maximum start-up time for the default clock source.
3. The default setting of CKSEL3..0 results in internal RC Oscillator @ 8.0 MHz. See
1. See section “Signature Bytes” for more information.
2. See section “Calibration Byte” for more information.
(1)
See
on page 25
Fuse Low Byte
Contents of Device Signature Imprint Table.
“Power Management and Sleep Modes” on page 31
Table 6-5 on page 26
High Byte
Signature byte 0
Calibration data for internal oscillator
Signature byte 1
Reserved for internal use
Signature byte 2
Reserved for internal use
for details.
135.
Bit No
7
6
5
4
3
2
1
0
(1)
(1)
(1)
for details.
Description
Select start-up time
Select start-up time
Divide clock by 8
Clock Output Enable
Select Clock source
Select Clock source
Select Clock source
Select Clock source
(2)
Table
“Reading the Fuse and Lock Bits
for details.
19-6.
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
(2)
(3)
(3)
(3)
(2)
(3)
Table 6-4
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