ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 93

• Manufacturer Part Number: ATTINY43U-MU
• Description: MCU AVR 4K FLASH 8MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY43U-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.9.3
12.9.4
8048B–AVR–03/09
TCCR0B – Timer/Counter Control Register B
TCCR1B – Timer/Counter Control Register B
Table 12-8.
Note:
• Bit 7 – FOCnA: Force Output Compare A
The FOCnA bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCRnB is written when operating in PWM mode. When writing a logical one to the FOCnA bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OCnA output is
changed according to its COMnA1:0 bits setting. Note that the FOCnA bit is implemented as a
strobe. Therefore it is the value present in the COMnA1:0 bits that determines the effect of the
forced compare.
A FOCnA strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCRnA as TOP.
The FOCnA bit is always read as zero.
• Bit 6 – FOCnB: Force Output Compare B
The FOCnB bit is only active when the WGM bits specify a non-PWM mode.
Bit
0x33 (0x53)
Read/Write
Initial Value
Bit
0x2E (0x4E)
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX = 0xFF, BOTTOM = 0x00
WGMn2
0
0
0
0
1
1
1
1
Waveform Generation Mode Bit Description
FOC0A
FOC1A
W
W
7
0
7
0
WGMn1
0
0
1
1
0
0
1
1
FOC0B
FOC1B
W
W
6
0
6
0
WGMn0
0
1
0
1
0
1
0
1
R
R
5
–
0
5
–
0
Timer/Counter
Mode of
Operation
Normal
PWM, Phase
Correct
CTC
Fast PWM
Reserved
PWM, Phase
Correct
Reserved
Fast PWM
R
R
4
–
0
4
–
0
WGM02
WGM12
R/W
R/W
3
0
3
0
OCRnA
OCRnA
OCRnA
0xFF
0xFF
0xFF
TOP
–
–
CS02
CS12
R/W
R/W
2
0
2
0
Immediate
Immediate
Update of
OCRx at
CS01
CS11
R/W
R/W
TOP
TOP
TOP
TOP
1
0
1
0
–
–
CS00
CS10
R/W
R/W
0
0
0
0
TOV Flag
BOTTOM
BOTTOM
Set on
MAX
MAX
MAX
TOP
–
–
TCCR0B
TCCR1B
(1)
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