ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 4

• Manufacturer Part Number: ATTINY43U-MU
• Description: MCU AVR 4K FLASH 8MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY43U-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-MLF®, QFN
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2. Overview
4
ATtiny43U
The ATtiny43U is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC
architecture. By executing powerful instructions in a single clock cycle, the ATtiny43U achieves
throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-
sumption versus processing speed.
Figure 2-1.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
VBAT
GND
LSW
PROGRAMMING
CONVERTER
INSTRUCTION
INSTRUCTION
DATA REGISTER
INTERFACE
PROGRAM
REGISTER
DECODER
CONTROL
Block Diagram
ON-CHIP
BOOST
DEBUG
LOGIC
FLASH
LINES
PORT A
ISP
DRIVERS
PORT A
PA7:0
V
CC
DIRECTION REG.
SUPERVISION
REGISTERS
PORT A
PROGRAM
REGISTER
COUNTER
PURPOSE
GENERAL
POINTER
POWER
STATUS
STACK
SRAM
RESET
RESET
ALU
POR
BOD
X
Y
Z
DATA REGISTER
MCU CONTROL
MCU STATUS
OSCILLATOR
WATCHDOG
INTERRUPT
COUNTER0
COUNTER1
REGISTER
REGISTER
INTERNAL
PORT B
EEPROM
TIMER/
TIMER/
TIMER
UNIT
USI
DRIVERS
PORT B
PB7:0
DIRECTION REG.
COMPARATOR
CALIBRATED
OSCILLATOR
REFERENCE
TIMING AND
PORT B
CONTROL
VOLTAGE
ANALOG
ADC
8048B–AVR–03/09