ATTINY43U-MU Atmel, ATTINY43U-MU Datasheet - Page 2

MCU AVR 4K FLASH 8MHZ 20-QFN

ATTINY43U-MU

Manufacturer Part Number
ATTINY43U-MU
Description
MCU AVR 4K FLASH 8MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY43U-MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-MLF®, QFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
ATSTK600-TINYX3U - STK600 SOCKET/ADAPTER TINYX3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. Pin Configurations
Figure 1-1.
1.1
1.1.1
1.1.2
1.1.3
2
Pin Descriptions
ATtiny43U
V
GND
Port A (PA7:PA0)
CC
Pinout of ATtiny43U
Supply voltage.
Ground.
Port A is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
(USCK/SCL/PCINT14)
(DO/OC1B/PCINT13)
(T1/CLKO/PCINT11) PB
(DI/OC1A/PCINT12)
(USCK/SCL/PCINT14) PB6
(OC0B/PCINT9) PB2
(DO/OC1B/PCINT13) PB5
NOTE: Bottom pad should
(T1/CLKO/PCINT11) PB3
(DI/OC1A/PCINT12) PB4
be Soldered to ground.
(OC0B/PCINT10) PB2
(OC0A/PCINT9) PB1
(INT0/PCINT15) PB7
(T0/PCINT8) PB0
PB4
PB5
PB6
QFN/MLF Top View
3
GND
VCC
1
2
3
4
5
1
2
3
4
5
6
7
8
9
10
SOIC
20
19
18
17
16
15
14
13
12
11
15
14
13
12
11
PA7 (RESET/dW/PCINT7)
PA6 (CLKI/PCINT6)
PA5 (AIN1/PCINT5)
PA4 (AIN0/PCINT4)
PA3 (ADC3/PCINT3)
PA2 (ADC2/PCINT2)
PA1 (ADC1/PCINT1)
PA0 (ADC0/PCINT0)
VBAT
LSW
PA4 (AIN0/
PA3 (ADC3/
PA2 (ADC2/
PA1 (ADC1/
PA0 (ADC0/
PCINT4
PCINT3
PCINT2
PCINT1
PCINT0
)
)
)
)
)
8048B–AVR–03/09

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