DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 180

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.6.2
When DRAM space is accessed in DMAC single address mode, full access (normal access) is always performed. The
DACK output goes low from the T
In modes other than DMAC single address mode, burst access can be used when accessing DRAM space.
Figure 6-29 shows the DACK output timing for the DRAM interface when DDS = 0.
6.7
6.7.1
With the H8S/2357 Group, external space area 0 can be designated as burst ROM space, and burst ROM interfacing can
be performed. The burst ROM space interface enables 16-bit configuration ROM with burst access capability to be
accessed at high speed.
Area 0 can be designated as burst ROM space by means of the BRSTRM bit in BCRH. Consecutive burst accesses of a
maximum of 4 words or 8 words can be performed for CPU instruction fetches only. One or two states can be selected for
burst access.
Rev.6.00 Oct.28.2004 page 150 of 1016
REJ09B0138-0600H
When DDS = 0
Burst ROM Interface
Overview
Figure 6-29 DACK Output Timing when DDS = 0 (Example of DRAM Access)
Read
Write
LCAS, (LCAS)
CAS, (UCAS),
r
HWR, (WE)
HWR, (WE)
CSn, (RAS)
state in the case of the DRAM interface.
D
D
A
15
15
23
DACK
to D
to D
to A
Note: n = 2 to 5
ø
0
0
0
T
p
Row
T
r
T
c1
Column
T
c2