DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 487

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 6—Timer Mode Select (WT/IT): Selects whether the WDT is used as a watchdog timer or interval timer. If used as
an interval timer, the WDT generates an interval timer interrupt request (WOVI) when TCNT overflows. If used as a
watchdog timer, the WDT generates the WDTOVF signal*
Bit 6
WT/IT
0
1
Notes: 1. The WDTOVF pin function is not available in the F-ZTAT version, the H8S/2398, H8S/2394, H8S/2392 or
Bit 5—Timer Enable (TME): Selects whether TCNT runs or is halted.
Bit 5
TME
0
1
Bits 4 and 3—Reserved: These bits cannot be modified and are always read as 1.
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select one of eight internal clock sources, obtained by
dividing the system clock (ø), for input to TCNT.
Bit 2
CKS2
0
1
Note: * The overflow period is the time from when TCNT starts counting up from H'00 until overflow occurs.
13.2.3
Note: * Can only be written with 0 for flag clearing.
Bit
Initial value :
R/W
2. For details of the case where TCNT overflows in watchdog timer mode, see section 13.2.3, Reset
Bit 1
CKS1
0
1
0
1
Reset Control/Status Register (RSTCSR)
H8S/2390.
Control/Status Register (RSTCSR).
Description
Interval timer: Sends the CPU an interval timer interrupt request (WOVI)
when TCNT overflows
Watchdog timer: Generates the WDTOVF signal*
Description
TCNT is initialized to H'00 and halted
TCNT counts
:
:
WOVF
R/(W)*
Bit 0
CKS0
0
1
0
1
0
1
0
1
7
0
RSTE
R/W
Description
Clock
ø/2 (Initial value)
ø/64
ø/128
ø/512
ø/2048
ø/8192
ø/32768
ø/131072
6
0
RSTS
R/W
5
0
Overflow Period (when ø = 20 MHz)*
25.6 s
819.2 s
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68 s
—
—
4
1
1
when TCNT overflows.
—
—
1
3
1
when TCNT overflows*
—
—
2
1
—
—
Rev.6.00 Oct.28.2004 page 457 of 1016
1
1
(Initial value)
(Initial value)
2
—
—
0
1
REJ09B0138-0600H