DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 81

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(3) Hardware Standby Mode: A transition to hardware standby mode is made when the STBY pin goes low. In
hardware standby mode, the CPU and clock halt and all MCU operations stop. The on-chip supporting modules are reset,
but as long as a specified voltage is supplied, on-chip RAM contents are retained.
2.9
2.9.1
The CPU is driven by a system clock, denoted by the symbol ø. The period from one rising edge of ø to the next is
referred to as a "state." The memory cycle or bus cycle consists of one, two, or three states. Different methods are used to
access on-chip memory, on-chip supporting modules, and the external address space.
2.9.2
On-chip memory is accessed in one state. The data bus is 16 bits wide, permitting both byte and word transfer instruction.
Figure 2-14 shows the on-chip memory access cycle. Figure 2-15 shows the pin states.
Basic Timing
Overview
On-Chip Memory (ROM, RAM)
ø
Internal address bus
Read
access
Write
access
Internal read signal
Internal data bus
Internal write signal
Internal data bus
Figure 2-14 On-Chip Memory Access Cycle
Bus cycle
Address
T
1
Read data
Write data
Rev.6.00 Oct.28.2004 page 51 of 1016
REJ09B0138-0600H