DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 466

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

12.2
12.2.1
TCNT0 and TCNT1 are 8-bit readable/writable up-counters that increment on pulses generated from an internal or
external clock source. This clock source is selected by clock select bits CKS2 to CKS0 of TCR. The CPU can read or
write to TCNT0 and TCNT1 at all times.
TCNT0 and TCNT1 comprise a single 16-bit register, so they can be accessed together by word transfer instruction.
TCNT0 and TCNT1 can be cleared by an external reset input or by a compare match signal. Which signal is to be used for
clearing is selected by clock clear bits CCLR1 and CCLR0 of TCR.
When a timer counter overflows from H'FF to H'00, OVF in TCSR is set to 1.
TCNT0 and TCNT1 are each initialized to H'00 by a reset and in hardware standby mode.
12.2.2
TCORA0 and TCORA1 are 8-bit readable/writable registers. TCORA0 and TCORA1 comprise a single 16-bit register so
they can be accessed together by word transfer instruction.
TCORA is continually compared with the value in TCNT. When a match is detected, the corresponding CMFA flag of
TCSR is set. Note, however, that comparison is disabled during the T
The timer output can be freely controlled by these compare match signals and the settings of bits OS1 and OS0 of TCSR.
TCORA0 and TCORA1 are each initialized to H'FF by a reset and in hardware standby mode.
Rev.6.00 Oct.28.2004 page 436 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Register Descriptions
Timer Counters 0 and 1 (TCNT0, TCNT1)
Time Constant Registers A0 and A1 (TCORA0, TCORA1)
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
:
: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
15
15
0
1
14
14
0
1
13
13
0
1
TCORA0
12
12
TCNT0
0
1
11
11
0
1
10
10
0
1
9
0
9
1
8
0
8
1
7
0
7
1
6
0
6
1
2
5
0
5
1
state of a TCOR write cycle.
TCORA1
TCNT1
4
0
4
1
3
0
3
1
2
0
2
1
1
0
1
1
0
0
0
1