DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 266

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.6
The sources of interrupts generated by the DMAC are transfer end and transfer break. Table 7-14 shows the interrupt
sources and their priority order.
Table 7-14 Interrupt Source Priority Order
Enabling or disabling of each interrupt source is set by means of the DTIE bit for the corresponding channel in DMABCR,
and interrupts from each source are sent to the interrupt controller independently.
The relative priority of transfer end interrupts on each channel is decided by the interrupt controller, as shown in table 7-
14.
Figure 7-39 shows a block diagram of a transfer end/transfer break interrupt. An interrupt is always generated when the
DTIE bit is set to 1 while DTE bit is cleared to 0.
In full address mode, a transfer break interrupt is generated when the DTME bit is cleared to o while DTIEB bit is set to 1.
In both short address mode and full address mode, DMABCR should be set so as to prevent the occurrence of a
combination that constitutes a condition for interrupt generation during setting.
Rev.6.00 Oct.28.2004 page 236 of 1016
REJ09B0138-0600H
Interrupts
Interrupt
Name
DEND0A
DEND0B
DEND1A
DEND1B
DTE/
DTME
Figure 7-39 Block Diagram of Transfer End/Transfer Break Interrupt
DTIE
Short Address Mode
Interrupt due to end of
transfer on channel 0A
Interrupt due to end of
transfer on channel 0B
Interrupt due to end of
transfer on channel 1A
Interrupt due to end of
transfer on channel 1B
Interrupt Source
Full Address Mode
Interrupt due to end of
transfer on channel 0
Interrupt due to break in
transfer on channel 0
Interrupt due to end of
transfer on channel 1
Interrupt due to break in
transfer on channel 1
Transfer end/transfer
break interrupt
Interrupt
Priority Order
High
Low