DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 328

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Port 6 Data Direction Register (P6DDR)
P6DDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port 6. P6DDR
cannot be read; if it is, an undefined value will be read.
Setting a P6DDR bit to 1 makes the corresponding port 6 pin an output pin, while clearing the bit to 0 makes the pin an
input pin.
P6DDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode. As the DMAC is initialized by a manual reset*, the pin states are determined by the
P6DDR and P6DR specifications.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 6 Data Register (P6DR)
P6DR is an 8-bit readable/writable register that stores output data for the port 6 pins (P6
P6DR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Port 6 Register (PORT6)
Note: * Determined by state of pins P6
PORT6 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port 6
pins (P6
If a port 6 read is performed while P6DDR bits are set to 1, the P6DR values are read. If a port 6 read is performed while
P6DDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORT6 contents are determined by the pin states, as P6DDR and
P6DR are initialized. PORT6 retains its prior state after a manual reset*, and in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 298 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
Bit
Initial value :
R/W
7
to P6
:
:
:
:
:
:
0
) must always be performed on P6DR.
P67DDR P66DDR P65DDR P64DDR P63DDR P62DDR P61DDR P60DDR
P67DR
R/W
P67
—*
W
7
0
7
0
7
R
P66DR
R/W
P66
—*
W
6
0
6
0
6
R
7
P65DR
to P6
R/W
P65
—*
W
5
0
5
0
5
R
0
.
P64DR
R/W
P64
—*
W
4
0
4
0
4
R
P63DR
R/W
P63
—*
W
3
0
3
0
3
R
P62DR
R/W
P62
—*
W
2
0
2
0
2
R
P61DR
R/W
P61
—*
W
1
0
1
0
1
R
7
to P6
P60DR
R/W
P60
—*
W
0
0
0
0
0
R
0
).