DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 594

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.2
19.2.1
Note: * Determined by pins MD
MDCR is an 8-bit read-only register that indicates the current operating mode of the H8S/2357 Group.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bits 6 to 3—Reserved: These bits cannot be modified and are always read as 0.
Bits 2 to 0—Mode Select 2 to 0 (MDS2 to MDS0): These bits indicate the input levels at pins MD
operating mode). Bits MDS
written to. The mode pin (MD
canceled by a power-on reset, but are retained after a manual reset*.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
19.2.2
Enabling or disabling of part of the H8S/2357’s on-chip ROM area can be selected by means of the EAE bit in BCRL.
For details of the other bits in BCRL, see section 6.2.5, Bus Control Register L (BCRL).
Bit 5—External Address Enable (EAE): Selects whether addresses H'010000 to H'01FFFF*
or external addresses.
Notes: 1. Reserved areas should not be accessed.
Rev.6.00 Oct.28.2004 page 564 of 1016
REJ09B0138-0600H
Bit
Initial value :
R/W
Bit
Initial value :
R/W
2. Addresses H'010000 to H'01FFFF are in the H8S/2357. Addresses H'010000 to H'03FFFF are in the H8S/2398.
Register Descriptions
Mode Control Register (MDCR)
Bus Control Register L (BCRL)
Bit 5
EAE
0
1
:
:
:
:
BRLE
R/W
—
—
7
1
7
0
Description
Addresses H'010000 to H'01FFFF*
Addresses H'010000 to H'01FFFF*
mode)
or a reserved area*
BREQOE
2
to MDS
R/W
2
—
—
2
6
0
6
0
to MD
to MD
0
0
0
correspond to pins MD
.
) input levels are latched into these bits when MDCR is read. These latches are
EAE
R/W
—
—
5
0
5
1
1
(single-chip mode).
LCASS
R/W
—
—
4
0
4
1
2
2
DDS
R/W
are in on-chip ROM
2
—
—
are external addresses (external expansion
3
0
3
1
to MD
0
MDS2
. MDS2 to MDS0 are read-only bits, and cannot be
R/W
—*
—
2
R
2
1
WDBE
MDS1
R/W
—*
1
R
1
0
WAITE
MDS0
R/W
—*
0
R
0
0
2
are to be internal addresses
(Initial value)
2
to MD
0
(the current