DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 940

IC H8S/2300 MCU FLASH 128QFP

DF2398F20V

Manufacturer Part Number
DF2398F20V
Description
IC H8S/2300 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2398F20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2398F20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
PDPCR—Port D MOS Pull-Up Control Register
PEPCR—Port E MOS Pull-Up Control Register
P3ODR—Port 3 Open Drain Control Register
PAODR—Port A Open Drain Control Register
Rev.6.00 Oct.28.2004 page 910 of 1016
REJ09B0138-0600H
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
Bit
Initial value
Read/Write
Note: Setting is prohibited in the H8S/2352, H8S/2394, H8S/2392, and H8S/2390.
:
:
:
:
:
:
:
:
:
:
:
:
Controls the MOS input pull-up function incorporated into port E on a bit-by-bit basis
Controls the MOS input pull-up function incorporated into port D on a bit-by-bit basis
Undefined
PE7PCR
PD7PCR
PA7ODR
R/W
R/W
R/W
7
7
0
7
0
7
0
Controls the PMOS on/off status for each port A pin (PA
PE6PCR
PD6PCR
Undefined
PA6ODR
R/W
R/W
R/W
6
0
6
0
6
6
0
Controls the PMOS on/off status for each port 3 pin (P3
PE5PCR
PD5PCR
P35ODR
PA5ODR
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
H'FF73
H'FF74
H'FF76
H'FF77
PE4PCR
PD4PCR
PA4ODR
P34ODR
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
[On-chip ROM version Only]
[On-chip ROM version Only]
[On-chip ROM version Only]
PE3PCR
PD3PCR
PA3ODR
P33ODR
R/W
R/W
3
0
R/W
3
0
R/W
3
0
3
0
PE2PCR
PD2PCR
PA2ODR
P32ODR
R/W
R/W
2
0
2
0
R/W
R/W
2
0
2
0
PE1PCR
PD1PCR
PA1ODR
R/W
P31ODR
R/W
1
0
1
0
Port D
Port A
R/W
Port E
R/W
Port 3
7
1
0
1
0
to PA
PE0PCR
PD0PCR
R/W
PA0ODR
R/W
0
P30ODR
)
0
0
0
0
5
R/W
R/W
to P3
0
0
0
0
0
)

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