DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 204

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.2.4
DMACR is an 8-bit readable/writable register that controls the operation of each DMAC channel.
DMACR is initialized to H'00 by a reset, and in hardware standby mode.
Bit 7—Data Transfer Size (DTSZ): Selects the size of data to be transferred at one time.
Bit 6—Data Transfer Increment/Decrement (DTID): Selects incrementing or decrementing of MAR every data transfer
in sequential mode or repeat mode.
In idle mode, MAR is neither incremented nor decremented.
Bit 5—Repeat Enable (RPE): Used in combination with the DTIE bit in DMABCR to select the mode (sequential, idle,
or repeat) in which transfer is to be performed.
For details of operation in sequential, idle, and repeat mode, see section 7.5.2, Sequential Mode, section 7.5.3, Idle Mode,
and section 7.5.4, Repeat Mode.
Rev.6.00 Oct.28.2004 page 174 of 1016
REJ09B0138-0600H
Bit
DMACR
Initial value :
R/W
DMA Control Register (DMACR)
Bit 7
DTSZ
0
1
Bit 6
DTID
0
1
Bit 5
RPE
0
1
:
:
:
DTSZ
R/W
7
0
Description
Byte-size transfer
Word-size transfer
Description
MAR is incremented after a data transfer
MAR is decremented after a data transfer
DMABCR
DTIE
0
1
0
1
When DTSZ = 0, MAR is incremented by 1 after a transfer
When DTSZ = 1, MAR is incremented by 2 after a transfer
When DTSZ = 0, MAR is decremented by 1 after a transfer
When DTSZ = 1, MAR is decremented by 2 after a transfer
DTID5
R/W
6
0
Description
Transfer in sequential mode (no transfer end interrupt)
Transfer in sequential mode (with transfer end interrupt)
Transfer in repeat mode (no transfer end interrupt)
Transfer in idle mode (with transfer end interrupt)
RPE
R/W
5
0
DTDIR
R/W
4
0
DTF3
R/W
3
0
DTF2
R/W
2
0
DTF1
R/W
1
0
DTF0
R/W
0
0
(Initial value)
(Initial value)
(Initial value)