PIC24FJ256DA206-I/MR Microchip Technology, PIC24FJ256DA206-I/MR Datasheet - Page 145

MCU PIC 16BIT FLASH 256K 64VQFN

PIC24FJ256DA206-I/MR

Manufacturer Part Number
PIC24FJ256DA206-I/MR
Description
MCU PIC 16BIT FLASH 256K 64VQFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA206-I/MR

Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
64-VFQFN, Exposed Pad
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
UART, SPI, USB, I2C, RS-485, RS-232
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240001, DM240312, DV164039
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 8-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
Note 1:
CPDIV1
R/W-0
R/W-0
ROI
2:
This bit is automatically cleared when the ROI bit is set and an interrupt occurs.
This setting is not allowed while the USB module is enabled.
ROI: Recover on Interrupt bit
1 = Interrupts clear the DOZEN bit and reset the CPU peripheral clock ratio to 1:1
0 = Interrupts have no effect on the DOZEN bit
DOZE<2:0>: CPU Peripheral Clock Ratio Select bits
111 = 1:128
110 = 1:64
101 = 1:32
100 = 1:16
011 = 1:8
010 = 1:4
001 = 1:2
000 = 1:1
DOZEN: DOZE Enable bit
1 = DOZE<2:0> bits specify the CPU peripheral clock ratio
0 = CPU peripheral clock ratio is set to 1:1
RCDIV<2:0>: FRC Postscaler Select bits
111 = 31.25 kHz (divide by 256)
110 = 125 kHz (divide by 64)
101 = 250 kHz (divide by 32)
100 = 500 kHz (divide by 16)
011 = 1 MHz (divide by 8)
010 = 2 MHz (divide by 4)
001 = 4 MHz (divide by 2)
000 = 8 MHz (divide by 1)
CPDIV<1:0>: System Clock Select bits (postscaler select from 32 MHz clock branch)
11 = 4 MHz (divide by 8)
10 = 8 MHz (divide by 4)
01 = 16 MHz (divide by 2)
00 = 32 MHz (divide by 1)
CPDIV0
DOZE2
R/W-0
R/W-0
CLKDIV: CLOCK DIVIDER REGISTER
W = Writable bit
‘1’ = Bit is set
DOZE1
PLLEN
R/W-0
R/W-0
(1)
(2)
(2)
G1CLKSEL
PIC24FJ256DA210 FAMILY
DOZE0
R/W-0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DOZEN
R/W-0
U-0
(1)
RCDIV2
R/W-0
U-0
x = Bit is unknown
RCDIV1
R/W-0
U-0
DS39969B-page 145
RCDIV0
R/W-1
U-0
bit 8
bit 0

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