PIC24FJ256DA206-I/MR Microchip Technology, PIC24FJ256DA206-I/MR Datasheet - Page 247

MCU PIC 16BIT FLASH 256K 64VQFN

PIC24FJ256DA206-I/MR

Manufacturer Part Number
PIC24FJ256DA206-I/MR
Description
MCU PIC 16BIT FLASH 256K 64VQFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Datasheets

Specifications of PIC24FJ256DA206-I/MR

Program Memory Type
FLASH
Program Memory Size
256KB (85.5K x 24)
Package / Case
64-VFQFN, Exposed Pad
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
UART, SPI, USB, I2C, RS-485, RS-232
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
23
Number Of Timers
5
Operating Supply Voltage
3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240001, DM240312, DV164039
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 18-2:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-12
bit 11
bit 10
bit 9-0
Note 1:
R/W-x, HSC
UOWN
R/W-x
BC7
This bit is ignored unless DTSEN = 1.
UOWN: USB Own bit
0 = The microcontroller core owns the BD and its corresponding buffer; the USB module ignores all
DTS: Data Toggle Packet bit
1 = Data 1 packet
0 = Data 0 packet
Reserved: Maintain as ‘0’
DTSEN: Data Toggle Synchronization Enable bit
1 = Data toggle synchronization is enabled; data packets with incorrect sync value will be ignored
0 = No data toggle synchronization is performed
BSTALL: Buffer Stall Enable bit
1 = Buffer STALL enabled; STALL handshake issued if a token is received that would use the BD in
0 = Buffer STALL disabled
BC<9:0>: Byte Count bits
This represents the number of bytes to be transmitted or the maximum number of bytes to be received
during a transfer. Upon completion, the byte count is updated by the USB module with the actual
number of bytes transmitted or received.
R/W-x, HSC
DTS
R/W-x
BC6
other fields in the BD
the given location (UOWN bit remains set, BD value is unchanged); corresponding EPSTALL bit
will get set on any STALL handshake
BDnSTAT: BUFFER DESCRIPTOR n STATUS REGISTER PROTOTYPE, CPU
MODE (BD0STAT THROUGH BD63STAT)
(1)
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
R/W-x, HSC
Reserved
BC5
r-0
(1)
R/W-x, HSC
Reserved
PIC24FJ256DA210 FAMILY
BC4
r-0
U = Unimplemented bit, read as ‘0’
‘r’ = Reserved bit
R/W-x, HSC
DTSEN
R/W-x
BC3
R/W-x, HSC
BSTALL
R/W-x
BC2
r = Reserved bit
x = Bit is unknown
R/W-x, HSC
R/W-x, HSC
BC9
BC1
DS39969B-page 247
R/W-x, HSC
R/W-x, HSC
BC8
BC0
bit 8
bit 0

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