PIC24FJ256DA206-I/MR Microchip Technology, PIC24FJ256DA206-I/MR Datasheet - Page 313

• Manufacturer Part Number: PIC24FJ256DA206-I/MR
• Description: MCU PIC 16BIT FLASH 256K 64VQFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA206-I/MR

• Program Memory Type: FLASH
• Program Memory Size: 256KB (85.5K x 24)
• Package / Case: 64-VFQFN, Exposed Pad
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 96 KB
• Interface Type: UART, SPI, USB, I2C, RS-485, RS-232
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240001, DM240312, DV164039
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 22-9:
REGISTER 22-10: G1W1ADRH: GPU WORK AREA 1 START ADDRESS REGISTER HIGH
REGISTER 22-11: G1W2ADRL: GPU WORK AREA 2 START ADDRESS REGISTER LOW
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
W1ADR15
W1ADR7
W1ADR23
W2ADR15
W2ADR7
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
U-0
—
W1ADR<15:0>: GPU Work Area 1 Start Address Low bits
Work area address must point to an even byte address in memory.
W1ADR14
W1ADR6
Unimplemented: Read as ‘0’
W1ADR<23:16>: GPU Work Area 1 Start Address High bits
Work area address must point to an even byte address in memory.
W2ADR<15:0>: GPU Work Area 2 Start Address Low bits
Work area address must point to an even byte address in memory.
R/W-0
R/W-0
W1ADR22
W2ADR14
W2ADR6
R/W-0
R/W-0
R/W-0
U-0
—
G1W1ADRL: GPU WORK AREA 1 START ADDRESS REGISTER LOW
W = Writable bit
‘1’ = Bit is set
W1ADR13
W1ADR5
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
R/W-0
R/W-0
W1ADR21
W2ADR13
W2ADR5
R/W-0
R/W-0
R/W-0
U-0
—
W1ADR12
W1ADR4
PIC24FJ256DA210 FAMILY
R/W-0
R/W-0
W1ADR20
W2ADR12
W2ADR4
R/W-0
R/W-0
R/W-0
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
W1ADR11
W1ADR3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
W1ADR19
W2ADR11
W2ADR3
R/W-0
R/W-0
R/W-0
U-0
—
W1ADR10
W1ADR2
W1ADR18
R/W-0
R/W-0
W2ADR10
R/W-0
W2ADR2
U-0
R/W-0
R/W-0
—
x = Bit is unknown
x = Bit is unknown
W1ADR9
W1ADR1
W1ADR17
R/W-0
R/W-0
x = Bit is unknown
R/W-0
W2ADR9
W2ADR1
U-0
—
R/W-0
R/W-0
DS39969B-page 313
W1ADR16
W1ADR8
W1ADR0
R/W-0
R/W-0
W2ADR8
W2ADR0
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0
bit 8
bit 0