PIC24FJ256DA206-I/MR Microchip Technology, PIC24FJ256DA206-I/MR Datasheet - Page 70

• Manufacturer Part Number: PIC24FJ256DA206-I/MR
• Description: MCU PIC 16BIT FLASH 256K 64VQFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256DA206-I/MR

• Program Memory Type: FLASH
• Program Memory Size: 256KB (85.5K x 24)
• Package / Case: 64-VFQFN, Exposed Pad
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 96 KB
• Interface Type: UART, SPI, USB, I2C, RS-485, RS-232
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 5
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240001, DM240312, DV164039
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-32:
TABLE 4-33:
TABLE 4-34:
RCON
OSCCON
CLKDIV
CLKDIV2
OSCTUN
REFOCON
Legend:
Note
NVMCON
NVMKEY
Legend:
Note
PMD1
PMD2
PMD3
PMD4
PMD5
PMD6
Legend:
Note
Name
Name
Name
File
File
File
1:
2:
1:
1:
Addr
Addr
0740
0742
0744
0746
0748
074E
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The Reset value of the RCON register is dependent on the type of Reset event. See Section 6.0 “Resets” for more information.
The Reset value of the OSCCON register is dependent on both the type of Reset event and the device configuration. See Section 8.0 “Oscillator Configuration” for more information.
0760
0766
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Reset value shown is for POR only. Value on other Reset states is dependent on the state of memory write or erase operations at the time of Reset.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Unimplemented in 64-pin devices, read as ‘0’.
Addr
077A
0770
0772
0774
0776
0778
GCLKDIV6
SYSTEM REGISTER MAP
NVM REGISTER MAP
PMD REGISTER MAP
TRAPR
Bit 15
ROEN
Bit 15
ROI
IC8MD
Bit 15
T5MD
—
—
WR
—
—
—
—
—
GCLKDIV5
IOPUWR
COSC2
DOZE2
Bit 14
Bit 14
WREN
IC7MD
Bit 14
T4MD
—
—
—
—
—
—
—
GCLKDIV4
ROSSLP
WRERR
COSC1
DOZE1
Bit 13
Bit 13
IC6MD
Bit 13
T3MD
—
—
—
—
—
—
—
GCLKDIV3
Bit 12
IC5MD
COSC0
DOZE0
ROSEL
Bit 12
T2MD
Bit 12
—
—
—
—
—
—
—
—
GCLKDIV2
IC4MD
Bit 11
Bit 11
T1MD
RODIV3
DOZEN
Bit 11
—
—
—
—
—
—
—
—
—
CMPMD
IC3MD
GCLKDIV1
Bit 10
Bit 10
RCDIV2
RODIV2
NOSC2
Bit 10
—
—
—
—
—
—
—
—
RTCCMD
IC2MD
GCLKDIV0
Bit 9
Bit 9
RCDIV1
RODIV1
NOSC1
—
—
—
—
—
—
Bit 9
CM
—
PMPMD
IC1MD
IC9MD
Bit 8
RCDIV0
RODIV0
Bit 8
VREGS
NOSC0
—
—
—
—
—
Bit 8
—
—
(1)
CRCMD
I2C1MD
OC8MD
CLKLOCK
Bit 7
CPDIV1
Bit 7
EXTR
—
Bit 7
—
—
—
—
—
—
UPWMMD
GFX1MD
ERASE
OC7MD
IOLOCK
Bit 6
CPDIV0
U2MD
Bit 6
Bit 6
SWR
—
—
—
—
—
SWDTEN
PLLEN
LOCK
TUN5
OC6MD
Bit 5
Bit 5
U1MD
U4MD
—
—
—
Bit 5
—
—
—
NVMKEY Register<7:0>
G1CLKSEL
SPI2MD
OC5MD
Bit 4
WDTO
Bit 4
TUN4
Bit 4
—
—
—
—
—
—
—
—
NVMOP3
REFOMD CTMUMD
SPI1MD
OC4MD
Bit 3
U3MD
Bit 3
SLEEP
TUN3
Bit 3
—
—
CF
—
—
—
NVMOP2
OC3MD
I2C3MD
Bit 2
POSCEN
Bit 2
Bit 2
TUN2
IDLE
—
—
—
—
—
—
NVMOP1
OC2MD
I2C2MD
LVDMD
SOSCEN
Bit 1
Bit 1
Bit 1
TUN1
BOR
—
—
—
—
—
—
NVMOP0
ADC1MD
USB1MD
SPI3MD
OC1MD
OC9MD
OSWEN
Bit 0
Bit 0
TUN0
Bit 0
POR
—
—
—
—
0000
0000
Resets
Resets
Resets
Note 1
Note 2
0000
0000
0000
0000
0000
0000
0100
0000
0000
0000
All
All
All
(1)