HD64F2636UF20 Renesas Electronics America, HD64F2636UF20 Datasheet - Page 12

IC H8S MCU FLASH 128K 128QFP

HD64F2636UF20

Manufacturer Part Number
HD64F2636UF20
Description
IC H8S MCU FLASH 128K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2636UF20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Item
14.4 Usage Notes
Retransfer Operations
(Except Block Transfer
Mode):
• Retransfer operation
when SCI is transmit
mode
15.2.9 Module Stop
Control Register B
(MSTPCRB)
15.3.6 Slave Transmit
Operation
Figure 15-18 Example
of Slave Transmit Mode
Operation Timing
(MLS = 0)
16.1.3 Pin
Configuration
Table 16-1 HCAN Pins
16.1.4 Register
Configuration
Table 16-2 HCAN
Registers
16.2.4 Mailbox
Configuration Register
(MBCR)
16.2.5 Transmit Wait
Register (TXPR)
Page xii of l
Page
544
575
594
614
618
624
625
Revision (See Manual for Details)
Note amended
Note: * The DTC is not implemented in the H8S/2635 Group.
Description amended
MSTPCRB is initialized to H'FF by a power-on reset and in
hardware standby mode. It is not initialized
standby mode.
Figure amended
Note amended
Note: * The HCAN1 is not supported by the H8S/2635 Group.
Notes amended
Notes: 2. The HCAN1 is not supported by the H8S/2635
Table amended
Bit y: MBCRx
0
1
Table amended
Bit y: TXPRx
0
1
User processing
ICDRS
[3] IRIC
clearance
Group.
Description
Corresponding mailbox is set for transmission
Corresponding mailbox is set for reception
Description
Transmit message idle state in corresponding mailbox
[Clearing condition]
Transmit message transmit wait in corresponding mailbox (CAN bus
arbitration)
Message transmission completion and cancellation completion
[3] ICDR
write
Data 1
[3] ICDR
write
(x = 15 to 1, y = 15 to 9 and 7 to 0)
(x = 15 to 1, y = 15 to 9 and 7 to 0)
REJ09B0103-0800 Rev. 8.00
in software
[5] IRIC
clearance
Data 2
May 28, 2010
(Initial value)
(Initial value)
[5] ICDR
write

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