HD64F2636UF20 Renesas Electronics America, HD64F2636UF20 Datasheet - Page 36

• Manufacturer Part Number: HD64F2636UF20
• Description: IC H8S MCU FLASH 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2636UF20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

10.3 Interface to Bus Master ..................................................................................................... 347
10.4 Operation .......................................................................................................................... 349
10.5 Interrupts........................................................................................................................... 377
10.6 Operation Timing.............................................................................................................. 380
10.7 Usage Notes ...................................................................................................................... 388
Section 11 Programmable Pulse Generator (PPG)
11.1 Overview........................................................................................................................... 399
11.2 Register Descriptions ........................................................................................................ 403
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10.2.5 Timer Status Register (TSR)................................................................................ 338
10.2.6 Timer Counter (TCNT)........................................................................................ 342
10.2.7 Timer General Register (TGR) ............................................................................ 343
10.2.8 Timer Start Register (TSTR) ............................................................................... 344
10.2.9 Timer Synchro Register (TSYR) ......................................................................... 345
10.2.10 Module Stop Control Register A (MSTPCRA) ................................................... 346
10.3.1 16-Bit Registers ................................................................................................... 347
10.3.2 8-Bit Registers ..................................................................................................... 347
10.4.1 Overview ............................................................................................................. 349
10.4.2 Basic Functions.................................................................................................... 350
10.4.3 Synchronous Operation........................................................................................ 356
10.4.4 Buffer Operation .................................................................................................. 358
10.4.5 Cascaded Operation ............................................................................................. 362
10.4.6 PWM Modes........................................................................................................ 364
10.4.7 Phase Counting Mode.......................................................................................... 370
10.5.1 Interrupt Sources and Priorities ........................................................................... 377
10.5.2 DTC Activation ................................................................................................... 379
10.5.3 A/D Converter Activation.................................................................................... 379
10.6.1 Input/Output Timing ............................................................................................ 380
10.6.2 Interrupt Signal Timing ....................................................................................... 384
11.1.1 Features................................................................................................................ 399
11.1.2 Block Diagram..................................................................................................... 400
11.1.3 Pin Configuration................................................................................................. 401
11.1.4 Registers .............................................................................................................. 402
11.2.1 Next Data Enable Registers H and L (NDERH, NDERL)................................... 403
11.2.2 Output Data Registers H and L (PODRH, PODRL)............................................ 404
11.2.3 Next Data Registers H and L (NDRH, NDRL).................................................... 405
11.2.4 Notes on NDR Access ......................................................................................... 405
11.2.5 PPG Output Control Register (PCR) ................................................................... 407
11.2.6 PPG Output Mode Register (PMR) ..................................................................... 409
11.2.7 Port 1 Data Direction Register (P1DDR)............................................................. 412
.................................................... 399
REJ09B0103-0800 Rev. 8.00
May 28, 2010