HD64F2636UF20 Renesas Electronics America, HD64F2636UF20 Datasheet - Page 30

• Manufacturer Part Number: HD64F2636UF20
• Description: IC H8S MCU FLASH 128K 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2636UF20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.9
2.10 Usage Note........................................................................................................................ 77
Section 3 MCU Operating Modes
3.1
3.2
3.3
3.4
3.5
Section 4 Exception Handling
4.1
4.2
Page xxx of l
2.8.3
2.8.4
2.8.5
2.8.6
Basic Timing..................................................................................................................... 69
2.9.1
2.9.2
2.9.3
2.9.4
2.9.5
2.9.6
2.10.1 TAS Instruction ................................................................................................... 77
2.10.2 STM/LDM Instructions ....................................................................................... 77
2.10.3 Caution to Observe when Using Bit Manipulation Instructions .......................... 77
Overview........................................................................................................................... 79
3.1.1
3.1.2
Register Descriptions ........................................................................................................ 80
3.2.1
3.2.2
3.2.3
Operating Mode Descriptions ........................................................................................... 85
3.3.1
3.3.2
3.3.3
3.3.4
Pin Functions in Each Operating Mode ............................................................................ 86
Address Map in Each Operating Mode............................................................................. 87
Overview........................................................................................................................... 93
4.1.1
4.1.2
4.1.3
Reset ................................................................................................................................. 96
4.2.1
4.2.2
Exception-Handling State .................................................................................... 65
Program Execution State ..................................................................................... 68
Bus-Released State .............................................................................................. 68
Power-Down State ............................................................................................... 68
Overview ............................................................................................................. 69
On-Chip Memory (ROM, RAM) ......................................................................... 69
On-Chip Supporting Module Access Timing ...................................................... 71
On-Chip HCAN Module Access Timing............................................................. 73
Port H and J Register Access Timing .................................................................. 75
External Address Space Access Timing .............................................................. 76
Operating Mode Selection ................................................................................... 79
Register Configuration......................................................................................... 80
Mode Control Register (MDCR) ......................................................................... 80
System Control Register (SYSCR) ...................................................................... 81
Pin Function Control Register (PFCR) ................................................................ 83
Mode 4................................................................................................................. 85
Mode 5................................................................................................................. 85
Mode 6................................................................................................................. 85
Mode 7................................................................................................................. 86
Exception Handling Types and Priority............................................................... 93
Exception Handling Operation ............................................................................ 94
Exception Vector Table ....................................................................................... 94
Overview ............................................................................................................. 96
Reset Sequence .................................................................................................... 96
......................................................................................... 93
.................................................................................. 79
REJ09B0103-0800 Rev. 8.00
May 28, 2010