HD64F2636UF20 Renesas Electronics America, HD64F2636UF20 Datasheet - Page 778

IC H8S MCU FLASH 128K 128QFP

HD64F2636UF20

Manufacturer Part Number
HD64F2636UF20
Description
IC H8S MCU FLASH 128K 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2636UF20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
Motor Control PWM, POR, PWM, WDT
Number Of I /o
72
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 19 Motor Control PWM Timer
Bits 9 to 0—Duty (DT): Bits 9 to 0 set the PWM output duty according to the values in bits 9 to 0
in the buffer register that is transferred by a PWCYR2 compare match. A high level (or a low level
when the corresponding bit in PWPR2 is set to 1) is output from the time PWCNT2 is cleared by a
PWCYR2 compare match until a PWDTR2 compare match occurs. When all the bits are 0, there
is no high-level output period (no low-level output period when the corresponding bit in PWPR2
is set to 1).
Page 728 of 1458
PWCNT2
(lower 10 bits)
PWCYR2
(lower 10 bits)
PWDTR2
(lower 10 bits)
PWM output
PWCNT2
(lower 10 bits)
PWCYR2
(lower 10 bits)
PWDTR2
(lower 10 bits)
PWM output
(M = 0)
PWM output
(0 < M < N)
PWM output
(N ≤ M)
Figure 19-7 Differences in PWM Output According to Duty Register Set Value
Figure 19-6 Duty Register Compare Match (OPS = 0 in PWPR2)
0
0
1
1
(OPS = 0 in PWPR2)
M
N
Compare match
M − 2
M
N
M − 1
M
H8S/2639, H8S/2638, H8S/2636,
REJ09B0103-0800 Rev. 8.00
H8S/2630, H8S/2635 Group
N − 2
N − 1
N − 1
May 28, 2010
0
0

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