73S1210F-68IM/F Maxim Integrated Products, 73S1210F-68IM/F Datasheet - Page 126

• Manufacturer Part Number: 73S1210F-68IM/F
• Description: IC SMART CARD READER 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 73S1210F-68IM/F

• Core Processor: 80515
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, SmartCard, UART/USART
• Peripherals: LED, POR, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

73S1210F Data Sheet
© 2009 Teridian Semiconductor Corporation. All rights reserved.
Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation.
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All other trademarks are the property of their respective owners.
Teridian Semiconductor Corporation makes no warranty for the use of its products, other than expressly
contained in the Company’s warranty detailed in the Teridian Semiconductor Corporation standard Terms
and Conditions. The company assumes no responsibility for any errors which may appear in this
document, reserves the right to change devices or specifications detailed herein at any time without
notice and does not make any commitment to update the information contained herein. Accordingly, the
reader is cautioned to verify that this document is current by comparing it to the latest version on
http://www.teridian.com or by checking with your sales representative.
126
1.3
1.4
1/22/2009
5/12/2009
Teridian Semiconductor Corp., 6440 Oak Canyon, Suite 100, Irvine, CA 92618
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In
the activation sequence begins (either by VCCOK=1 or VCCTMR timeout)
and will go high ½ the ETU period thereafter.”
In
into three primary types. These are commonly referred to as 2-wire,
3-wire and I2C synchronous cards. Each card type requires different
control and timing and therefore requires different algorithms to access.
Teridian has created an application note to provide detailed algorithms for
each card type. Refer to the application note titled 73S12xxF
Synchronous Card Design Application Note.”
In
In
In
Added
Added
Added
Formatted the document per new standard. Added section numbering.
Changed the value for the
µA to 15 µA.
In
Added the “with Programming” ordering numbers to
Section
Section
Table 78
Figure
Section
Table
44-pin QFN
Section 8, Related
Section 9, Contact
1, corrected the 44 QFN GND pin from 37 to 26.
25, replaced the schematic with a new schematic.
1.7.15.5, deleted “The ETU clock is held in reset condition until
1.7.15.5, added “Synchronous card operation is broken down
3.4, changed the Fxtal Min from 4 to 6.
and
Table
package.
107, changed the SYCKST bit to I2CMODE.
Documentation.
Information.
I
DD_IN
Power Down (25°C)
Table
parameter from 13
109.
DS_1210F_001
Rev. 1.4