73S1210F-68IM/F Maxim Integrated Products, 73S1210F-68IM/F Datasheet - Page 21

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73S1210F-68IM/F

Manufacturer Part Number
73S1210F-68IM/F
Description
IC SMART CARD READER 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 73S1210F-68IM/F

Core Processor
80515
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
8
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
73S1210F-68IM/F
Manufacturer:
TERIDIAN
Quantity:
7 728
DS_1210F_001
Program Status Word (PSW):
Stack Pointer: The stack pointer (SP) is a 1-byte register initialized to 0x07 after reset. This register is
incremented before PUSH and CALL instructions, causing the stack to begin at location 0x08.
Data Pointer: The data pointer (DPTR) is 2 bytes wide. The lower part is DPL, and the highest is DPH.
It can be loaded as a 2-byte register (MOV DPTR,#data16) or as two registers (e.g. MOV DPL,#data8). It
is generally used to access external code or data space (e.g. MOVC A,@A+DPTR or MOVX A,@DPTR
respectively).
Program Counter: The program counter (PC) is 2 bytes wide initialized to 0x0000 after reset. This
register is incremented during the fetching operation code or when operating on data from program
memory. Note: The program counter is not mapped to the SFR area.
Port Registers: The I/O ports are controlled by Special Function Register USR70. The contents of the
SFR can be observed on corresponding pins on the chip. Writing a 1 to any of the ports (see Table 10)
causes the corresponding pin to be at high level (3.3V), and writing a 0 causes the corresponding pin to
be held at low level (GND). The data direction register
pins (see the
Rev. 1.4
Register
USR70
UDIR70
PSW.7
PSW.6
PSW.5
PSW.4
PSW.3
PSW.2
PSW.1
PSW.0
Bit
MSB
Address
User (USR) Ports
0x90
0x91
SFR
CV
Symbol
RS1
RS0
OV
CV
AC
F0
F1
P
R/W
R/W
R/W
AC
Carry flag.
Auxiliary Carry flag for BCD operations.
General purpose Flag 0 available for user.
Register bank select control bits. The contents of RS1 and RS0 select the
working register bank:
Overflow flag.
General purpose Flag 1 available for user.
Parity flag, affected by hardware to indicate odd / even number of “one” bits
in the Accumulator, i.e. even parity.
section for details).
Register for User port bit 7:0 read and write operations (pins USR0…
USR7).
Data direction register for User port bits 0:7. Setting a bit to 0 means
that the corresponding pin is an output.
F0
RS1/RS0
Table 10: Port Registers
Table 9: PSW Register
00
01
10
11
RS1
Bank Selected
RS
UDIR70
Bank 0
Bank 1
Bank 2
Bank 3
Function
Description
define individual pins as input or output
OV
(0x08 – 0x0F)
(0x18 – 0x1F)
(0x00 – 0x07)
(0x10 – 0x17)
Location
73S1210F Data Sheet
P
LSB
21

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